SP706PEU datasheet(10/18 Pages) SIPEX

Part #	SP706PEU

Description	3.0V/3.3V Low Power Microprocessor Supervisory Circuits

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Date: 6-28-04

SP706 +3.0/ +3.3 Low Power Microprocessor Circuits

the reset threshold, an internal timer releases

RESET after 200ms. RESET pulses LOW when-

ever V

CC dips below the reset threshold, such as

in a brownout condition. When a brownout

condition occurs in the middle of a previously

initiated reset pulse, the pulse continues for at

least another 140ms. During power-down, once

V

CC falls below the reset threshold, RESET

stays LOW and is guaranteed to be 0.4V or less

until V

CC drops below 1V.

The active-HIGH RESET output is simply

the complement of the RESET output and is

guaranteed to be valid with V

CC down to 1.1V.

Some

µPs, such as Intel's 80C51, require an

active-HIGH reset pulse.

Watchdog Timer

The SP706P/R/S/T-SP708R/S/T series watchdog

circuit monitors the

µP's activity. If the µP does

not toggle the watchdog input (WDI) within 1.6

seconds and WDI is not tri-stated, WDO goes

LOW. As long as RESET is asserted or the WDI

input is tri-stated, the watchdog timer will stay

cleared and will not count. As soon as RESET

is released and WDI is driven HIGH or LOW,

the timer will start counting. Pulses as short as

50ns can be detected.

Typically, WDO will be connected to the

non-maskable interrupt input (NMI) of a

µP.

When V

CC drops below the reset threshold, WDO

will go LOW independent of the current status

of the watchdog timer. Normally this would

trigger an NMI but RESET goes LOW simulta-

neously, and thus overrides the NMI.

If WDI is left unconnected, WDO can be used as

a low-line output. Since floating WDI disables

the internal timer, WDO goes LOW only when

V

CC

falls below the reset threshold, thus

functioning as a low-line output.

Power-Fail Comparator

The power-fail comparator can be used for

various purposes because its output and

noninverting input are not internally connected.

The inverting input is internally connected to

a 1.25V reference.

FEATURES

The SP706P/R/S/T-SP708R/S/T series provides

four key functions:

1. A reset output during power-up, power-down

and brownout conditions.

2. An independent watchdog output that goes

LOW if the watchdog input has not been toggled

within 1.6 sec.

3. A 1.25V threshold detector for power-fail

warning, low battery detection, or monitoring a

power supply other than +3.3V/+3.0V.

4. An active-LOW manual-reset that allows

RESET to be triggered by a pushbutton switch.

The SP706R/S/T devices are the same as the

SP708R/S/T devices except for the active-HIGH

RESET substitution of the watchdog timer. The

SP706P device is the same as the SP706R de-

vice except an active-HIGH RESET is provided

rather than an active-LOW RESET.

THEORY OF OPERATION

The SP706P/R/S/T-SP708R/S/T series is a mi-

croprocessor (

µP) supervisory circuit that moni-

tors the power supplied to digital circuits such

as microprocessors, microcontrollers, or

memory. The series is an ideal solution for

portable, battery-powered equipment that re-

quires power supply monitoring. Implementing

this series will reduce the number of compo-

nents and overall complexity of a system. The

watchdog functions of this product family will

continuously oversee the operational status of a

system. The operational features and benefits of

the SP706P/R/S/T-SP708R/S/T series are de-

scribed, in more detail, below.

RESET Output

A microprocessor's reset input starts the

µP

in a known state. The SP706P/R/S/T-SP708R/

S/T series asserts reset during power-up and

prevents code execution errors during power-

down or brownout conditions.

During power-up, once V

CC reaches 1V, RESET

is a guaranteed logic LOW of 0.4V or less. As

V

CC

rises, RESET stays LOW. When V

CC rises above

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