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SAA4955TJ Datasheet(PDF) 9 Page - NXP Semiconductors |
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SAA4955TJ Datasheet(HTML) 9 Page - NXP Semiconductors |
9 / 28 page 1999 Apr 29 9 Philips Semiconductors Product specification 2.9-Mbit field memory SAA4955TJ Cascade operation If a longer delay is needed, the total storage depth can be increased beyond 2949264 bits by cascading several SAA4955TJs. For details see the interconnection and timing diagrams (Figs 17 and 18). Test mode operation The SAA4955TJ incorporates a test mode not intended for customer use. If WE and RSTW are held HIGH continuously for 1024 SWCK clock cycles, the SAA4955TJ will enter test mode. It will exit test mode if WE is LOW for a single SWCK cycle or if RSTW is LOW for 2 SWCK clock cycles. LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). Notes 1. Machine model: equivalent to discharging a 200 pF capacitor through a 0 Ω series resistor (‘0 Ω’ is actually 0.75 µH+10 Ω). 2. Human body model: equivalent to discharging a 100 pF capacitor through a 1500 Ω series resistor. THERMAL CHARACTERISTICS SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VDD, VDD(O) supply voltages −0.5 +5 V VDD(P) supply voltage for protection circuits −0.5 +5.5 V VI input voltage VDD(P) =5V −0.5 +5.5 V VDD =VDD(O) =VDD(P) = 3.3 V −0.5 +3.8 V VO output voltage VDD(P) =5V −0.5 +5 V VDD =VDD(O) =VDD(P) = 3.3 V −0.5 +3.8 V IDD(tot) total supply current − 200 mA ∆V voltage difference between GND, GNDO and GNDP −0.5 +0.5 V IO short circuit output current − 50 mA Ptot total power dissipation − 750 mW Tstg storage temperature −20 +150 °C Tj junction temperature 0 125 °C Tamb ambient temperature 0 70 °C Ves electrostatic handling note 1 −150 +200 V note 2 −2000 +2000 V SYMBOL PARAMETER CONDITIONS VALUE UNIT Rth(j-a) thermal resistance from junction to ambient in free air 60 K/W |
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