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XRT86VL34 Datasheet(PDF) 6 Page - Exar Corporation |
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XRT86VL34 Datasheet(HTML) 6 Page - Exar Corporation |
6 / 63 page XRT86VL34 I QUAD T1/E1/J1 FRAMER/LIU COMBO - HARDWARE DESCRIPTION REV. V1.2.0 LIST OF FIGURES Figure 1.: XRT86VL34 4-channel DS1 (T1/E1/J1) Framer/LIU Combo ............................................................................. 1 Figure 2.: Framer System Transmit Timing Diagram (Base Rate/Non-Mux) ................................................................... 42 Figure 3.: Framer System Receive Timing Diagram (RxSERCLK as an Output) ............................................................ 43 Figure 4.: Framer System Receive Timing Diagram (RxSERCLK as an Input) ............................................................... 44 Figure 5.: Framer System Transmit Timing Diagram (HMVIP and H100 Mode) ............................................................. 45 Figure 6.: Framer System Receive Timing Diagram (HMVIP/H100 Mode) ..................................................................... 46 Figure 7.: Framer System Transmit Overhead Timing Diagram ...................................................................................... 47 Figure 8.: Framer System Receive Overhead Timing Diagram (RxSERCLK as an Output) ........................................... 48 Figure 9.: Framer System Receive Overhead Timing Diagram (RxSERCLK as an Input) .............................................. 48 Figure 10.: ITU G.703 Pulse Template ............................................................................................................................ 52 Figure 11.: DSX-1 Pulse Template (normalized amplitude) ............................................................................................. 53 Figure 12.: Intel µP Interface Timing During Programmed I/O Read and Write Operations When ALE Is Not Tied ’HIGH’ 55 Figure 13.: Intel µP Interface Timing During Programmed I/O Read and Write Operations When ALE Is Tied ’HIGH’ .. 56 Figure 14.: Motorola Asychronous Mode Interface Signals During Programmed I/O Read and Write Operations ......... 57 Figure 15.: Power PC 403 Interface Signals During Programmed I/O Read and Write Operations ............................... 58 |
Similar Part No. - XRT86VL34_1 |
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Similar Description - XRT86VL34_1 |
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