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MH32S72BBFA-6 Datasheet(PDF) 1 Page - Mitsubishi Electric Semiconductor |
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MH32S72BBFA-6 Datasheet(HTML) 1 Page - Mitsubishi Electric Semiconductor |
1 / 56 page MITSUBISHI ELECTRIC 2,415,919,104-BIT ( 33,554,432-WORD BY 72-BIT ) Synchronous DYNAMIC RAM MH32S72BBFA -6 MITSUBISHI LSIs 16/Jun. /1999 MIT-DS-333-0.1 DESCRIPTION APPLICATION Main memoryunit for computers, Microcomputer memory. FEATURES Type name 133MHz 5.4ns MH32S72BBFA-6 Utilizes industrystandard 16M X 4 Synchronous DRAMs in TSOP package , industry standard Resister in TSSOP package , and industry standard PLL in TSSOP package. Single 3.3V +/- 0.3V supply Burst length 1/2/4/8/Full Page (programmable) Burst type sequential / interleave (programmable) Column access random Burst W rite / Single W rite (programmable) Auto precharge / Auto bank precharge controlled by A10 Auto refresh and Self refresh LVTTL Interface 4096 refresh cycles every 64ms Max. Frequency CLK Access Time [latch mode] (CL = 4) 1 1pin 10pin 11pin 40pin 41pin 84pin 85pin 94pin 95pin 124pin 125pin 168pin The MH32S72BBFA is 33554432 - word x 72-bit Sy nchronous DRAM stacked structural module. This consist of thirty -six industry standard 16M x 4 Sy nchronous DRAMs in TSOP. The stacked structure of TSOP on a card edge dual in- line package prov ides any application where high densities and large of quantities memory are required. This is a socket-ty pe memory module ,suitable f or easy interchange or addition of module. |
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