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MH32S72BAFA-7 Datasheet(PDF) 16 Page - Mitsubishi Electric Semiconductor

Part No. MH32S72BAFA-7
Description  2,415,919,104-BIT ( 33,554,432-WORD BY 72-BIT ) Synchronous DYNAMIC RAM
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Manufacturer  MITSUBISHI [Mitsubishi Electric Semiconductor]
Direct Link  http://www.mitsubishichips.com
Logo MITSUBISHI - Mitsubishi Electric Semiconductor

MH32S72BAFA-7 Datasheet(HTML) 16 Page - Mitsubishi Electric Semiconductor

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MITSUBISHI
ELECTRIC
2,415,919,104-BIT ( 33,554,432-WORD BY 72-BIT ) Synchronous DYNAMIC RAM
MH32S72BAFA -7,-8
MITSUBISHI LSIs
29.July.1998
MIT-DS-0243-0.0
AC TIMING REQUIREMENTS
(Ta=0 ~ 70°C, Vdd = 3.3 +/- 0.3V, Vss = 0V, unless otherwise noted)
Input Pulse Levels:
0.8V to 2.0V
Input Timing Measurement Level:
1.4V
CK
Signal
1.4V
1.4V
Any AC timing is
referenced to the input
signal crossing through
1.4V.
LATCH MODE
16
Limits
Symbol Parameter
-7
Unit
Min.
Max.
tCLK
CK cycle time
ns
tCH
CK High pulse width
3
10
ns
tCL
CK Low pilse width
3
ns
tT
Transition time of CK
1
10
ns
tIS
Input Setup time(all inputs)
2
ns
tIH
Input Hold time(all inputs)
0
ns
tRC
Row cycle time
70
ns
tRCD
Row to Column Delay
20
ns
tRAS
Row Active time
50
100000
ns
tRP
Row Precharge time
20
ns
tWR
Write Recovery time
10
ns
tRRD
Act to Act Deley time
20
ns
tCCD
Col to Col Delay time
10
ns
tRSC
Mode Register Set Cycle time
20
ns
tREF
Refresh Interval time
64
ms
CL=3
tSRX
Self Refresh Exit time
10
ns
-8
Min.
Max.
4
13
4
1
10
2
0
70
20
50
100000
20
10
20
10
20
64
10
10
CL=4
10
ns
Note:1 The timing requirements are assumed tT=1ns. If tT is longer than 1ns, (tT-1)ns
should be added to the parameter.


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