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MH32D72AKLB-75 Datasheet(PDF) 17 Page - Mitsubishi Electric Semiconductor

Part No. MH32D72AKLB-75
Description  2,415,919,104-BIT (33,554,432-WORD BY 72-BIT) Double Data Rate Synchronous DRAM Module
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Maker  MITSUBISHI [Mitsubishi Electric Semiconductor]
Homepage  http://www.mitsubishichips.com
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MH32D72AKLB-75 Datasheet(HTML) 17 Page - Mitsubishi Electric Semiconductor

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MITSUBISHI LSIs
MITSUBISHI ELECTRIC
MH32D72AKLB-75,-10
2,415,919,104-BIT (33,554,432-WORD BY 72-BIT) Double Data Rate Synchronous DRAM Module
MIT-DS-0399-0.2
21.Mar.2001
Preliminary Spec.
Some contents are subject to change without notice.
17
AVERAGE SUPPLY CURRENT from Vdd
(Ta=0 ~ 70°C
, Vdd = VddQ = 2.5 ± 0.2V, Vss = VssQ = 0V, Output Open, unless otherwise noted)
AC OPERATING CONDITIONS AND CHARACTERISTICS
(Ta=0 ~ 70°C
, Vdd = VddQ = 2.5 ± 0.2V, Vss = VssQ = 0V, unless otherwise noted)
1120
454
454
3640
3820
2335
2470
2380
2515
1480
1570
1120
1120
1120
760
760
1930
2020
1885
1975
-10
-75
ACTIVE POWER-DOWN STANDBY CURRENT: One bank activ e;
power-down mode; CKE
VIL (MAX); t CK = t CK MIN
mA
mA
mA
SELF REFRESH CURRENT: CKE
0.2V
AUTO REFRESH CURRENT: t RC = t RFC (MIN)
OPERATING CURRENT: Burst = 2; Writes; Continuous burst; One
bank activ e; Address and control inputs changing once per clock
cyc le; CL = 2.5; t CK = t CK MIN; DQ, DM and DQS inputs changing
twice per clock cyc le
OPERATING CURRENT: Burst = 2; Reads; Continuous burst;One
bank activ e; Address and control inputs changing once per clock
cyc le; CL = 2.5; t CK = t CK MIN; IOUT = 0 mA
ACTIVE STANDBY CURRENT: /CS > VIH (MIN); CKE > VIH (MIN);
One bank; Activ e-Precharge; t RC = t RAS MAX; t CK = t CK MIN;
DQ,DM and DQS inputs changing twice per clock cyc le; address and
other control inputs changing once per clock cyc le
IDLE STANDBY CURRENT: /CS > VIH (MIN); All banks idle;
CKE > VIH (MIN); t CK = t CK MIN; Address and other control inputs
changing once per clock cyc le
IDD2P
PRECHARGE POWER-DOWN STANDBY CURRENT: All banks idle;
power-down mode; CKE
VIL (MAX); t CK = t CK MIN
mA
OPERATING CURRENT: One Bank; Activ e-Read-Precharge;
Burst = 2; t RC = t RC MIN; CL = 2.5; t CK = t CK MIN; IOUT= 0
mA;Address and control inputs changing once per clock cyc le
OPERATING CURRENT: One Bank; Activ e-Precharge;
t RC = t RC MIN; t CK = t CK MIN; DQ, DM and DQS inputs changing
twice per clock cyc le; address and control inputs changing once per
clock cyc le
Parameter/Test Conditions
IDD4R
IDD3N
mA
mA
mA
mA
mA
mA
IDD6
IDD5
IDD4W
IDD3P
IDD2N
IDD1
IDD0
Notes
Unit
Limits(max)
Sym bol
Symbol
Parameter/Test Conditions
Limits
Min.
Max.
Unit
VIH(AC)
VIL(AC)
VID(AC)
VIX(AC)
High-Level Input Voltage (AC)
Low-Level Input Voltage (AC)
Input Differential Voltage, CLK and /CLK
Input Crossing Point Voltage, CLK and /CLK
Vref + 0.35
Vref - 0.35
V
V
V
V
0.7
0.5*VDDQ-0.2
VDDQ + 0.6
IOZ
Ii
Off-state Output Current /Q floating Vo=0~VDDQ
Input Current / VIN=0 ~ VddQ
µA
µA
-5
-10
5
10
0.5*VDDQ+0.2
Notes
7
8
9


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