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56F8357 Datasheet(PDF) 54 Page - Freescale Semiconductor, Inc |
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56F8357 Datasheet(HTML) 54 Page - Freescale Semiconductor, Inc |
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54 / 177 page  56F8357 Technical Data, Rev. 15 54 Freescale Semiconductor Preliminary TMRB2_CMP1 $20 Compare Register 1 TMRB2_CMP2 $21 Compare Register 2 TMRB2_CAP $22 Capture Register TMRB2_LOAD $23 Load Register TMRB2_HOLD $24 Hold Register TMRB2_CNTR $25 Counter Register TMRB2_CTRL $26 Control Register TMRB2_SCR $27 Status and Control Register TMRB2_CMPLD1 $28 Comparator Load Register 1 TMRB2_CMPLD2 $29 Comparator Load Register 2 TMRB2_COMSCR $2A Comparator Status and Control Register Reserved TMRB3_CMP1 $30 Compare Register 1 TMRB3_CMP2 $31 Compare Register 2 TMRB3_CAP $32 Capture Register TMRB3_LOAD $33 Load Register TMRB3_HOLD $34 Hold Register TMRB3_CNTR $35 Counter Register TMRB3_CTRL $36 Control Register TMRB3_SCR $37 Status and Control Register TMRB3_CMPLD1 $38 Comparator Load Register 1 TMRB3_CMPLD2 $39 Comparator Load Register 2 TMRB3_COMSCR $3A Comparator Status and Control Register Table 4-13 Quad Timer C Registers Address Map (TMRC_BASE = $00 F0C0) Register Acronym Address Offset Register Description TMRC0_CMP1 $0 Compare Register 1 TMRC0_CMP2 $1 Compare Register 2 TMRC0_CAP $2 Capture Register TMRC0_LOAD $3 Load Register TMRC0_HOLD $4 Hold Register TMRC0_CNTR $5 Counter Register Table 4-12 Quad Timer B Registers Address Map (Continued) (TMRB_BASE = $00 F080) Quad Timer B is NOT available in the 56F8157 device Register Acronym Address Offset Register Description |
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