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R1LV0416C-I Datasheet(PDF) 9 Page - Renesas Technology Corp

Part No. R1LV0416C-I
Description  Wide Temperature Range Version 4M SRAM (256-kword16-bit)
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

R1LV0416C-I Datasheet(HTML) 9 Page - Renesas Technology Corp

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R1LV0416C-I Series
Rev.2.00, May.26.2004, page 9 of 16
Write Cycle
R1LV0416C-I
-5SI
-7LI
Parameter
Symbol
Min
Max
Min
Max
Unit
Notes
Write cycle time
tWC
55
70
ns
Address valid to end of write
tAW
50
60
ns
Chip selection to end of write
tCW
50
60
ns
5
Write pulse width
tWP
40
50
ns
4
LB#, UB# valid to end of write
tBW
50
55
ns
Address setup time
tAS
0
0
ns
6
Write recovery time
tWR
0
0
ns
7
Data to write time overlap
tDW
25
30
ns
Data hold from write time
tDH
0
0
ns
Output active from end of write
tOW
5
5
ns
2
Output disable to output in high-Z
tOHZ
0
20
0
25
ns
1, 2, 3
Write to output in high-Z
tWHZ
0
20
0
25
ns
1, 2
Notes: 1. tCHZ, tOHZ, tWHZ and tBHZ are defined as the time at which the outputs achieve the open circuit
conditions and are not referred to output voltage levels.
2. This parameter is sampled and not 100% tested.
3. At any given temperature and voltage condition, tHZ max is less than tLZ min both for a given
device and from device to device.
4. A write occures during the overlap of a low CS1#, a high CS2, a low WE# and a low LB# or a low
UB#. A write begins at the latest transition among CS1# going low, CS2 going high, WE# going
low and LB# going low or UB# going low. A write ends at the earliest transition among CS1#
going high, CS2 going low, WE# going high and LB# going high or UB# going high. tWP is
measured from the beginning of write to the end of write.
5. tCW is measured from the later of CS1# going low or CS2 going high to the end of write.
6. tAS is measured from the address valid to the beginning of write.
7. tWR is measured from the earliest of CS1# or WE# going high or CS2 going low to the end of
write cycle.


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