Philips Semiconductors

Product specification

PLC18V8Z

Zero standby power

CMOS versatile PAL devices

1997 Aug 08

7

CONFIGURATION CELL

A single configuration cell controls the functions of Pins 1 and 11.

Refer to Functional Diagram. When the configuration cell is

programmed, Pin 1 is a dedicated clock and Pin 11 is dedicated for

output enable. When the configuration cell is unprogrammed, Pins 1

and 11 are both dedicated inputs. Note that the output enable for all

registered OMCs is common—from Pin 11 only. Output enable

control of the bidirectional I/O OMCs is provided from the AND array

via the direction product term.

If any one OMC is configured as registered, the configuration cell

will be automatically configured (via the design software) to ensure

that the clock and output enable functions are enabled on Pins 1

and 11, respectively. If none of the OMCs are registered, the

configuration cell will be programmed such that Pins 1 and 11 are

dedicated inputs. The programming codes are as follows:

Pin 1 = CLK, Pin 11 = OE

L

Pin 1 and Pin 11 = Input

H

CONTROL CELL CONFIGURATIONS

FUNCTION

CONFIG. CELL

COMMENTS

Registered mode

Programmed

Programmed

Programmed

Dedicated clock from Pin 1. OE Control

for all registerd OMCs from Pin 11 only.

Unprogrammed

Unprogrammed

Unprogrammed

Pins 1 and 11 are dedicated inputs.

3-State control from AND array only.

Fixed input mode

Unprogrammed

Programmed

Unprogrammed

Pins 1 and 11 are dedicated inputs.

Fixed output mode

Programmed

Unprogrammed

Unprogrammed

Pins 1 and 11 are dedicated inputs. The

NOTE:

1. This is the virgin state as shipped from the factory.

ARCHITECTURE CONTROL—AC1 and AC2

I

CODE

D

OMC CONFIGURATION

REGISTERED (D–TYPE)

1

11

S

CLK

F(D), F (D)

Q

OE

S

F(B), F (B)

DIR

CODE

B

OMC CONFIGURATION

CODE

O

OMC CONFIGURATION

FIXED OUTPUT

CODE

CONFIGURATION CELL

CODE

L

CONFIGURATION CELL

CODE

OMC CONFIGURATION

FIXED INPUT

BIDIRECTIONAL I/O1

(COMBINATORIAL)

PIN 1 = CLK

PIN 11 = OE

H6

PIN 1 = INPUT

PIN 11 = INPUT

S

F(O), F (O)

F (I)

F(D), F (D)

11

1

CLK Q

OE

11

1

CLK

Q

OE

NC

NC

SP

AR

SP

AR

SP

AR

SP00015

NOTES:

A factory shipped unprogrammed device is configured such that:

1. This is the initial unprogrammed state. All cells are in a conductive state.

2. All AND gates are pulled to a logic “0” (Low).

3. Output polarity is inverting.

4. Pins 1 and 11 are configured as inputs 0 and 9. The clock and OE functions are disabled.

5. All Output Macro Cells (OMCs) are configured as bidirectional I/O, with the outputs disabled via the direction term.

6. This configuration cannot be used if any OMCs are configured as registered (Code = D).