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KS8993M Datasheet(PDF) 39 Page - Micrel Semiconductor

Part No. KS8993M
Description  Integrated 3-Port 10/100 Managed Integrated 3-Port 10/100 Managed
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Maker  MICREL [Micrel Semiconductor]
Homepage  http://www.micrel.com
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KS8993M Datasheet(HTML) 39 Page - Micrel Semiconductor

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Micrel, Inc.
KS8993M/ML/MI
April 2005
39
M9999-041205
2.
Enable I
2C master mode by setting the KS8993M strap-in pins, PS[1:0] (pins 100 and 101, respectively) to
“00”.
3.
Check to ensure that the KS8993M reset signal input, RST_N (pin 67), is properly connected to the external
reset source at the board level.
4.
Program the desired configuration data into the EEPROM.
5.
Place the EEPROM on the board and power up the board.
6.
Assert an active-low reset to the RST_N pin of the KS8993M. After reset is de-asserted, the KS8993M will
begin reading the configuration data from the EEPROM. The KS8993M will check that the first byte read from
the EEPROM is “93”. If this value is correct, EEPROM configuration will continue. If not, EEPROM
configuration access is denied and all other data sent from the EEPROM will be ignored by the KS8993M.
The configuration access time (tprgm) is less than 15ms.
Note: For proper operation, check to ensure that the KS8993M PWRDN input signal (pin 36) is not asserted
during the reset operation. The PWRDN input is active low.
I
2C Slave Serial Bus Configuration
In managed mode, the KS8993M can be configured as an I
2C slave device. In this mode, an I2C master device
(external controller/CPU) has complete programming access to the KS8993M’s 128 registers. Programming
access includes the Global Registers, Port Registers, Advanced Control Registers and indirect access to the
“Static MAC Table”, “VLAN Table”, “Dynamic MAC Table,” and “MIB Counters.” The tables and counters are
indirectly accessed via registers 110 thru 120.
In I
2C slave mode, the KS8993M operates like other I2C slave devices. Addressing the KS8993M’s 8 bit registers
is similar to addressing Atmel’s AT24C02 EEPROM’s memory locations. Details of I
2C read/write operations and
related timing information can be found in the AT24C02 Datasheet.
Two fixed 8 bits device addresses are used to address the KS8993M in I
2C slave mode. One is for read; the other
is for write. The addresses are as follow:
1011_1111 <read>
1011_1110 <write>
The following is a sample procedure for programming the KS8993M using the I
2C slave serial bus:
1.
Enable I
2C slave mode by setting the KS8993M strap-in pins PS[1:0] (pins 100 and 101, respectively) to “01”.
2.
Power up the board and assert reset to the KS8993M. After reset, the “Start Switch” bit (register 1 bit 0) will
be set to ‘0’.
3.
Configure the desired register settings in the KS8993M, using the I
2C write operation.
4.
Read back and verify the register settings in the KS8993M, using the I
2C read operation.
5.
Write a ‘1’ to the “Start Switch” bit to start the KS8993M with the programmed settings.
Note: The “Start Switch” bit cannot be set to ‘0’ to stop the switch after an ‘1’ is written to this bit. Thus, it is
recommended that all switch configuration settings are programmed before the “Start Switch” bit is set to ‘1’.
Some of the configuration settings, such as “Aging enable”, “Auto Negotiation Enable”, “Force Speed” and “Power
down” can be programmed after the switch has been started.
SPI Slave Serial Bus Configuration
In managed mode, the KS8993M can be configured as a SPI slave device. In this mode, a SPI master device
(external controller/CPU) has complete programming access to the KS8993M’s 128 registers. Programming
access includes the Global Registers, Port Registers, Advanced Control Registers and indirect access to the
“Static MAC Table”, “VLAN Table”, “Dynamic MAC Table” and “MIB Counters”. The tables and counters are
indirectly accessed via registers 110 thru 120.
The KS8993M supports two standard SPI commands: ‘0000_0011’ for data read and ‘0000_0010’ for data write.
SPI multiple read and multiple write are also supported by the KS8993M to expedite register read back and
register configuration, respectively.


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