Electronic Components Datasheet Search
  English  ▼

Delete All
ON OFF
ALLDATASHEET.COM

X  

Preview PDF Download HTML

KS8993M Datasheet(PDF) 50 Page - Micrel Semiconductor

Part No. KS8993M
Description  Integrated 3-Port 10/100 Managed Integrated 3-Port 10/100 Managed
Download  85 Pages
Scroll/Zoom Zoom In 100% Zoom Out
Maker  MICREL [Micrel Semiconductor]
Homepage  http://www.micrel.com
Logo 

KS8993M Datasheet(HTML) 50 Page - Micrel Semiconductor

Zoom Inzoom in Zoom Outzoom out
 50 / 85 page
background image
Micrel, Inc.
KS8993M/ML/MI
April 2005
50
M9999-041205
Register 4 (0x04): Global Control 2 (continued)
Bit
Name
R/W
Description
Default
4
Flow control
and back
pressure fair
mode
R/W
= 1, fair mode is selected. In this mode, if a flow
control port and a non-flow control port talk to the
same destination port, packets from the non-flow
control port may be dropped. This is to prevent the
flow control port from being flow controlled for an
extended period of time.
= 0, in this mode, if a flow control port and a non-flow
control port talk to the same destination port, the flow
control port will be flow controlled. This may not be
“fair” to the flow control port.
1
3
No excessive
collision drop
R/W
= 1, the switch will not drop packets when 16 or more
collisions occur.
= 0, the switch will drop packets when 16 or more
collisions occur.
SMAC (pin
69) value
during
reset.
2
Huge packet
support
R/W
= 1, will accept packet sizes up to 1916 bytes
(inclusive). This bit setting will override setting from
bit 1 of the same register.
= 0, the max packet size will be determined by bit 1 of
this register.
0
1
Legal
Maximum
Packet size
check enable
R/W
= 0, will accept packet sizes up to 1536 bytes
(inclusive).
= 1, 1522 bytes for tagged packets, 1518 bytes for
untagged packets. Any packets larger than the
specified value will be dropped.
SMRXD0
(pin 85)
value
during
reset.
0
Priority Buffer
reserve
R/W
= 1, each output queue is pre-allocated 48 buffers,
used exclusively for high priority packets. It is
recommended to enable this when priority queue
feature is turned on.
= 0, no reserved buffers for high priority packets.
1
Register 5 (0x05): Global Control 3
Bit
Name
R/W
Description
Default
7
802.1Q VLAN
enable
R/W
= 1, 802.1Q VLAN mode is turned on. VLAN table
needs to set up before the operation.
= 0, 802.1Q VLAN is disabled.
0
6
IGMP snoop
enable on
Switch MII
interface
R/W
=1, IGMP snoop is enabled.
All the IGMP packets will be forwarded to the Switch
MII port.
=0, IGMP snoop is disabled.
0
5
Reserved
R/W
0
4
Reserved
R/W
0
3-2
Priority
Scheme select
R/W
00 = always deliver high priority packets first
01 = deliver high/low packets at ratio 10/1
10 = deliver high/low packets at ratio 5/1
11 = deliver high/low packets at ratio 2/1
00
1
Reserved
R/W
0


Html Pages

1  2  3  4  5  6  7  8  9  10  11  12  13  14  15  16  17  18  19  20  21  22  23  24  25  26  27  28  29  30  31  32  33  34  35  36  37  38  39  40  41  42  43  44  45  46  47  48  49  50  51  52  53  54  55  56  57  58  59  60  61  62  63  64  65  66  67  68  69  70  71  72  73  74  75  76  77  78  79  80  81  82  83  84  85 


Datasheet Download




Link URL




Privacy Policy
ALLDATASHEET.COM
Does ALLDATASHEET help your business so far?  [ DONATE ]  

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Alldatasheet API   |   Link Exchange   |   Manufacturer List
All Rights Reserved© Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn