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HCS08 Datasheet(PDF) 75 Page - Motorola, Inc |
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HCS08 Datasheet(HTML) 75 Page - Motorola, Inc |
75 / 290 page Data Sheet — MC9S08GB60/D V1.5 MOTOROLA 75 MC9S08GB/GT 5.8.5 System Device Identification Register (SDIDH, SDIDL) This read-only register is included so host development systems can identify the HCS08 derivative and revision number. This allows the development software to recognize where specific memory blocks, registers, and control bits are located in a target MCU. Figure 5-6 System Device Identification Register (SDIDH, SDIDL) REV[3:0] — Revision Number The high-order 4 bits of address $1806 are hard coded to reflect the current mask set revision number (0–F). ID[11:0] — Part Identification Number Each derivative in the HCS08 Family has a unique identification number. The MC9S08GB/GT is hard coded to the value $002. 5.8.6 System Real-Time Interrupt Status and Control Register (SRTISC) This register contains one read-only status flag, one write-only acknowledge bit, three read/write delay selects, and three unimplemented bits, which always read 0. Figure 5-7 System RTI Status and Control Register (SRTISC) Bit 7 6 5 4321 Bit 0 Read: REV3 REV2 REV1 REV0 ID11 ID10 ID9 ID8 Reset: 0(1) NOTES: 1. The revision number that is hard coded into these bits reflects the current silicon revision level. 0(1) 0(1) 0(1) 0000 Read: ID7 ID6 ID5 ID4 ID3 ID2 ID1 ID0 Reset: 0 0 0 00010 = Unimplemented or Reserved Bit 7 6 5 4321 Bit 0 Read: RTIF 0 RTICLKS RTIE 0 RTIS2 RTIS1 RTIS0 Write: RTIACK Reset: 0 0 0 00000 = Unimplemented or Reserved |
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