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PHW7N60E Datasheet(PDF) 1 Page - NXP Semiconductors |
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PHW7N60E Datasheet(HTML) 1 Page - NXP Semiconductors |
1 / 10 page Philips Semiconductors Product specification PowerMOS transistors PHP7N60E, PHB7N60E, PHW7N60E Avalanche energy rated FEATURES SYMBOL QUICK REFERENCE DATA • Repetitive Avalanche Rated • Fast switching V DSS = 600 V • Stable off-state characteristics • High thermal cycling performance I D = 7 A • Low thermal resistance R DS(ON) ≤ 1.2 Ω GENERAL DESCRIPTION N-channel, enhancement mode field-effect power transistor, intended for use in off-line switched mode power supplies, T.V. and computer monitor power supplies, d.c. to d.c. converters, motor control circuits and general purpose switching applications. The PHP7N60E is supplied in the SOT78 (TO220AB) conventional leaded package. The PHW7N60E is supplied in the SOT429 (TO247) conventional leaded package. The PHB7N60E is supplied in the SOT404 surface mounting package. PINNING SOT78 (TO220AB) SOT404 SOT429 (TO247) PIN DESCRIPTION 1 gate 2 drain 1 3 source tab drain LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT V DSS Drain-source voltage T j = 25 ˚C to 150˚C - 600 V V DGR Drain-gate voltage T j = 25 ˚C to 150˚C; RGS = 20 kΩ - 600 V V GS Gate-source voltage - ± 30 V I D Continuous drain current T mb = 25 ˚C; V GS = 10 V - 7 A T mb = 100 ˚C; VGS = 10 V - 4.5 A I DM Pulsed drain current T mb = 25 ˚C - 28 A P D Total dissipation T mb = 25 ˚C - 147 W T j, Tstg Operating junction and - 55 150 ˚C storage temperature range d g s 12 3 tab 13 tab 2 2 3 1 1 It is not possible to make connection to pin 2 of the SOT404 package. December 1998 1 Rev 1.400 |
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Similar Description - PHW7N60E |
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