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LH28F160BHE-TTL90 Datasheet(PDF) 11 Page - Sharp Corporation |
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LH28F160BHE-TTL90 Datasheet(HTML) 11 Page - Sharp Corporation |
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11 / 46 page  (Parameter Blocks 1 through 4) FCFFF F9000 [A19-A0]* FEFFF FE002 FE001 FE000 Boot Block 1 Reserved for Future Implementation Reserved for Future Implementation Boot Block 1 Lock Configuration Code FE003 F8FFF F8002 F8001 F8000 F8003 Parameter Block 5 Reserved for Future Implementation Reserved for Future Implementation Parameter Block 5 Lock Configuration Code FDFFF FD002 FD001 FD000 FD003 Parameter Block 0 Reserved for Future Implementation Reserved for Future Implementation Parameter Block 0 Lock Configuration Code (Main Blocks 1 through 29) EFFFF 08000 F7FFF F0002 F0001 F0000 F0003 Main Block 0 Reserved for Future Implementation Reserved for Future Implementation Main Block 0 Lock Configuration Code Top Boot FFFFF FF002 FF001 FF000 Boot Block 0 Reserved for Future Implementation Reserved for Future Implementation Boot Block 0 Lock Configuration Code FF003 07FFF 00004 00002 00000 Device Code Manufacturer Code Main Block 30 Main Block 30 Lock Configuration Code Reserved for Future Implementation 00003 00001 Permanent Lock Configuration Code *: Address A-1 don’t care. LHF16J04 9 Rev. 1.26 3.5 Read Identifier Codes The read identifier codes operation outputs the manufacturer code, device code, block lock configuration codes for each block and the permanent lock configuration code (see Figure 4). Using the manufacturer and device codes, the system CPU can automatically match the device with its proper algorithms. The block lock and permanent lock configuration codes identify locked and unlocked blocks and permanent lock-bit setting. 3.6 Write Writing commands to the CUI enable reading of device data and identifier codes. They also control inspection and clearing of the status register. When VCC=2.7V-3.6V and VCCW=VCCWH1/2, the CUI additionally controls block erase, full chip erase, word/byte write and lock-bit configuration. The Block Erase command requires appropriate command data and an address within the block to be erased. The Full Chip Erase command requires appropriate command data and an address within the device. The Word/Byte Write command requires the command and address of the location to be written. Set Permanent and Block Lock-Bit commands require the command and address within the device (Permanent Lock) or block within the device (Block Lock) to be locked. The Clear Block Lock-Bits command requires the command and address within the device. The CUI does not occupy an addressable memory location. It is written when WE# and CE# are active. The address and data needed to execute a command are latched on the rising edge of WE# or CE# (whichever goes high first). Standard microprocessor write timings are used. Figures 16 and 17 illustrate WE# and CE# controlled write operations. 4 COMMAND DEFINITIONS When the VCCW voltage ≤VCCWLK, read operations from the status register, identifier codes, or blocks are enabled. Placing VCCWH1/2 on VCCW enables successful block erase, full chip erase, word/byte write and lock-bit configuration operations. Device operations are selected by writing specific commands into the CUI. Table 3 defines these commands. Figure 4. Device Identifier Code Memory Map |
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