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DSP56857BUE Datasheet(PDF) 11 Page - Freescale Semiconductor, Inc |
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DSP56857BUE Datasheet(HTML) 11 Page - Freescale Semiconductor, Inc |
11 / 53 page Introduction 56857 Technical Data, Rev. 6 Freescale Semiconductor 11 18 VSSA VSSA Analog Ground (VSSA)—This pin supplies an analog ground. 19 VSSA 55 CS0 GPIOA0 Output Input/Output External Chip Select (CS0)—This pin is used as a dedicated GPIO. Port A GPIO (0)—This pin is a General Purpose I/O (GPIO) pin when not configured for host port usage. 56 CS1 GPIOA1 Output Input/Output External Chip Select (CS1)—This pin is used as a dedicated GPIO. Port A GPIO (1)—This pin is a General Purpose I/O (GPIO) pin when not configured for host port usage. 57 CS2 GPIOA2 Output Input/Output External Chip Select (CS2)—This pin is used as a dedicated GPIO. Port A GPIO (2)—This pin is a General Purpose I/O (GPIO) pin when not configured for host port usage. 58 CS3 GPIOA3 Output Input/Output External Chip Select (CS3)—This pin is used as a dedicated GPIO. Port A GPIO (3)—This pin is a General Purpose I/O (GPIO) pin when not configured for host port usage. 22 HD0 GPIOB0 Input Input/Output Host Address (HD0)—This input provides the address selection for HI registers. This pin is disconnected internally. Port B GPIO (0)—This pin is a General Purpose I/O (GPIO) pin when not configured for host port usage. 23 HD1 GPIOB1 Input Input/Output Host Address (HD1)—This input provides the address selection for HI registers. This pin is disconnected internally. Port B GPIO (1)—This pin is a General Purpose I/O (GPIO) pins when not configured for host port usage. 24 HD2 GPIOB2 Input Input/Output Host Address (HD2)—This input provides the address selection for HI registers. This pin is disconnected internally. Port B GPIO (2)—This pin is a General Purpose I/O (GPIO) pins when not configured for host port usage. Table 3-1 56857 Signal and Package Information for the 100-pin LQFP (Continued) Pin No. Signal Name Type Description |
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