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DSP56F826-827UM Datasheet(PDF) 10 Page - Freescale Semiconductor, Inc |
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DSP56F826-827UM Datasheet(HTML) 10 Page - Freescale Semiconductor, Inc |
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10 / 56 page  56F826 Technical Data, Rev. 14 10 Freescale Semiconductor 2.2 Signals and Package Information All inputs have a weak internal pull-up circuit associated with them. These pull-up circuits are always enabled. Exceptions: 1. When a pin is owned by GPIO, then the pull-up may be disabled under software control. 2. TCK has a weak pull-down circuit always active. Table 2-1 56F826 Signal and Package Information for the 100 Pin LQFP Signal Name Pin No. Type Description VDD 20 VDD Power—These pins provide power to the internal structures of the chip, and are generally connected to a 2.5V supply. VDD 64 VDD VDD 94 VDD VDDA 59 VDDA Analog Power—This pin is a dedicated power pin for the analog portion of the chip and should be connected to a low-noise 3.3V supply. VDDIO 5VDDIO Power In/Out—These pins provide power to the I/O structures of the chip, and are generally connected to a 3.3V supply. VDDIO 30 VDDIO VDDIO 57 VDDIO VDDIO 80 VDDIO VSS 19 VSS GND—These pins provide grounding for the internal structures of the chip. All should be attached to VSS. VSS 63 VSS VSS 95 VSS VSSA 60 VSSA Analog Ground—This pin supplies an analog ground. VSSIO 6VSSIO GND In/Out—These pins provide grounding for the I/O ring on the chip. All should be attached to VSS. VSSIO 31 VSSIO VSSIO 58 VSSIO VSSIO 81 VSSIO TCS 99 Input/Output (Schmitt) TCS—This pin is reserved for factory use. It must be tied to VSS for normal use. In block diagrams, this pin is considered an additional VSS. EXTAL 61 Input External Crystal Oscillator Input—This input should be connected to a 4MHz external crystal or ceramic resonator. For more information, please refer to Section 3.6. |
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