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SC101161DT Datasheet(PDF) 27 Page - Freescale Semiconductor, Inc |
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SC101161DT Datasheet(HTML) 27 Page - Freescale Semiconductor, Inc |
27 / 142 page Device User Guide — 9S12DT128DGV2/D V02.15 27 Freescale Semiconductor • SAE J1850 Class B Data Communications Network Interface – Compatible and ISO Compatible for Low-Speed (<125 Kbps) Serial Data Communications in Automotive Applications • Inter-IC Bus (IIC) – Compatible with I2C Bus standard – Multi-master operation – Software programmable for one of 256 different serial clock frequencies • 112-Pin LQFP and 80-Pin QFP package options – I/O lines with 5V input and drive capability – 5V A/D converter inputs – Operation at 50MHz equivalent to 25MHz Bus Speed – Development support – Single-wire background debug™ mode – On-chip hardware breakpoints 1.3 Modes of Operation User modes • Normal and Emulation Operating Modes – Normal Single-Chip Mode – Normal Expanded Wide Mode – Normal Expanded Narrow Mode – Emulation Expanded Wide Mode – Emulation Expanded Narrow Mode • Special Operating Modes – Special Single-Chip Mode with active Background Debug Mode – Special Test Mode (Freescale use only) – Special Peripheral Mode (Freescale use only) Low power modes • Stop Mode • Pseudo Stop Mode • Wait Mode |
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