Philips Semiconductors

Product Specification

PowerMOS transistor

PHP10N10E

GENERAL DESCRIPTION

QUICK REFERENCE DATA

N-channel enhancement mode

SYMBOL

PARAMETER

MAX.

UNIT

field-effect power transistor in a

plastic envelope. The device is

V

DS

Drain-source voltage

100

V

intended for use in Switched Mode

I

D

Drain current (DC)

11

A

Power Supplies (SMPS), motor

P

tot

Total power dissipation

60

W

control, welding, DC/DC and AC/DC

T

j

Junction temperature

175

˚C

converters, and in general purpose

R

DS(ON)

Drain-source on-state resistance

0.25

Ω

switching applications.

PINNING - TO220AB

PIN CONFIGURATION

SYMBOL

PIN

DESCRIPTION

1

gate

2

drain

3

source

tab

drain

LIMITING VALUES

Limiting values in accordance with the Absolute Maximum System (IEC 134)

SYMBOL

PARAMETER

CONDITIONS

MIN.

MAX.

UNIT

V

DS

Drain-source voltage

-

-

100

V

V

DGR

Drain-gate voltage

R

-

100

V

±V

GS

Gate-source voltage

-

-

30

V

I

D

Drain current (DC)

T

25 ˚C

-

11

A

I

D

Drain current (DC)

T

-

7.7

A

I

DM

Drain current (pulse peak value)

T

25 ˚C

-

44

A

P

tot

Total power dissipation

T

25 ˚C

-

60

W

T

stg

Storage temperature

-

- 55

175

˚C

T

j

Junction Temperature

-

-

175

˚C

THERMAL RESISTANCES

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

R

th j-mb

Thermal resistance junction to

-

-

2.5

K/W

mounting base

R

th j-a

Thermal resistance junction to

-

60

-

K/W

ambient

12 3

tab

d

g

s

September 1997

1

Rev 1.000