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PHN205 Datasheet(PDF) 9 Page - NXP Semiconductors |
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PHN205 Datasheet(HTML) 9 Page - NXP Semiconductors |
9 / 12 page 1997 Oct 22 9 Philips Semiconductors Product specification Dual N-channel enhancement mode MOS transistor PHN205 PACKAGE OUTLINE UNIT A max. A1 A2 A3 bp cD(1) E(2) (1) eHE LLp QZ y w v θ REFERENCES OUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC EIAJ mm inches 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 5.0 4.8 4.0 3.8 1.27 6.2 5.8 1.05 0.7 0.6 0.7 0.3 8 0 o o 0.25 0.1 0.25 DIMENSIONS (inch dimensions are derived from the original mm dimensions) Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. 1.0 0.4 SOT96-1 X w M θ A A1 A2 b p D HE L p Q detail X E Z e c L v M A (A ) 3 A 4 5 pin 1 index 1 8 y 076E03S MS-012AA 0.069 0.010 0.004 0.057 0.049 0.01 0.019 0.014 0.0100 0.0075 0.20 0.19 0.16 0.15 0.050 0.244 0.228 0.028 0.024 0.028 0.012 0.01 0.01 0.041 0.004 0.039 0.016 0 2.5 5 mm scale SO8: plastic small outline package; 8 leads; body width 3.9 mm SOT96-1 95-02-04 97-05-22 |
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