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SN65LVDM180DR Datasheet(PDF) 6 Page - Texas Instruments |
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SN65LVDM180DR Datasheet(HTML) 6 Page - Texas Instruments |
6 / 28 page www.ti.com RECEIVER ELECTRICAL CHARACTERISTICS DRIVER SWITCHING CHARACTERISTICS SN65LVDM179, SN65LVDM180 SN65LVDM050, SN65LVDM051 SLLS324H – DECEMBER 1998 – REVISED MAY 2007 over recommended operating conditions (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP(1) MAX UNIT VIT+ Positive-going differential input voltage threshold 50 See Figure 5 and Table 2 mV VIT- Negative-going differential input voltage threshold –50 VOH High-level output voltage IOH = -8 mA 2.4 V VOL Low-level output voltage IOL = 8 mA 0.4 V VI = 0 –20 –11 II Input current (A or B inputs) µA VI = 2.4 V –3 –1.2 II(OFF) Power-off input current (A or B inputs) VCC = 0 –20 20 µA IIH High-level input current (enables) VIH = 5 V 10 µA IIL Low-level input current (enables) VIL = 0.8 V 10 µA IOZ High-impedance output current VO = 0 or 5 V –10 10 µA CI Input capacitance 5 pF (1) All typical values are at 25°C and with a 3.3-V supply. over recommended operating conditions (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP(1) MAX UNIT tPLH Propagation delay time, low-to-high-level output 1.7 2.7 ns tPHL Propagation delay time, high-to-low-level output 1.7 2.7 ns tr Differential output signal rise time 0.6 1 ns RL = 50Ω, tf Differential output signal fall time CL = 10 pF, 0.6 1 ns See Figure 6 tsk(p) Pulse skew (|tpHL– tpLH|) 250 ps tsk(o) Channel-to-channel output skew(2) 100 ps tsk(pp) Part-to-part skew(3) 1 ns tPZH Propagation delay time, high-impedance-to-high-level output 6 10 ns tPZL Propagation delay time, high-impedance-to-low-level output 6 10 ns See Figure 7 tPHZ Propagation delay time, high-level-to-high-impedance output 4 10 ns tPLZ Propagation delay time, low-level-to-high-impedance output 5 10 ns (1) All typical values are at 25°C and with a 3.3-V supply. (2) tsk(o) is the maximum delay time difference between drivers on the same device. (3) tsk(pp) is the magnitude of the difference in propagation delay times between any specified terminals of two devices when both devices operate with the same supply voltages, at the same temperature, and have identical packages and test circuits. 6 Submit Documentation Feedback |
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