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NTD50N03R Datasheet(PDF) 1 Page - ON Semiconductor

Part # NTD50N03R
Description  Power MOSFET
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Manufacturer  ONSEMI [ON Semiconductor]
Direct Link  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

NTD50N03R Datasheet(HTML) 1 Page - ON Semiconductor

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© Semiconductor Components Industries, LLC, 2007
March, 2007 − Rev. 4
1
Publication Order Number:
NTD50N03R/D
NTD50N03R
Power MOSFET
25 V, 45 A, Single N−Channel, DPAK
Features
Planar Technology
Low RDS(on) to Minimize Conduction Losses
Low Capacitance to Minimize Driver Losses
Optimized Gate Charge to Minimize Switching Losses
Pb−Free Packages are Available
Applications
VCORE DC−DC Buck Converter Applications
Optimized for High Side Switching
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Parameter
Symbol
Value
Unit
Drain−to−Source Voltage
VDSS
25
V
Gate−to−Source Voltage
VGS
"20
V
Continuous Drain
Current (RqJA)
(Note 1)
Steady
State
TA = 25°C
ID
9.2
A
TA = 85°C
7.2
Power Dissipation
(RqJA) (Note 1)
TA = 25°C
PD
2.1
W
Continuous Drain
Current (RqJA)
(Note 2)
TA = 25°C
ID
7.8
A
TA = 85°C
6.0
Power Dissipation
(RqJA) (Note 2)
TA = 25°C
PD
1.5
W
Continuous Drain
Current (RqJC)
(Note 1)
TC = 25°C
ID
45
A
TC = 85°C
35
Power Dissipation
(RqJC) (Note 1)
TC = 25°C
PD
50
W
Pulsed Drain Current
TA = 25°C,
tp = 10 ms
IDM
180
A
Current Limited by
Package
TA = 25°C
IDmaxPkg
45
A
Operating Junction and Storage
Temperature
TJ, Tstg
−55 to
175
°C
Source Current (Body Diode)
IS
45
A
Drain−to−Source (dv/dt)
dv/dt
8.0
V/ns
Single Pulse Drain−to−Source Avalanche
Energy (TJ = 25°C, VDD = 50 V, VGS = 10 V,
IL = 6.32 Apk, L = 1.0 mH, RG = 25 W)
EAS
20
mJ
Lead Temperature for Soldering Purposes
(1/8
″ from case for 10 s)
TL
260
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Surface−mounted on FR4 board using 1 sq in pad, 1 oz Cu.
2. Surface−mounted on FR4 board using the minimum recommended pad size.
CASE 369AA
DPAK
(Surface Mount)
STYLE 2
MARKING DIAGRAMS
& PIN ASSIGNMENTS
Y
= Year
WW
= Work Week
T50N03R
= Device Code
G
= Pb−Free Package
3
Source
2
Drain
4
Drain
1
Gate
3
Source
2
Drain
4
Drain
CASE 369D
DPAK
(Straight Lead)
STYLE 2
1
Gate
25 V
12.5 m
W @ 10 V
RDS(on) TYP
45 A
ID MAX
V(BR)DSS
http://onsemi.com
19 m
W @ 4.5 V
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
ORDERING INFORMATION
D
S
G
N−Channel
1
2
3
4
CASE 369AC
3 IPAK
(Straight Lead)
1
2
3
4
1 2
3
4


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