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MC9S12C128MFU Datasheet(PDF) 63 Page - Freescale Semiconductor, Inc |
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MC9S12C128MFU Datasheet(HTML) 63 Page - Freescale Semiconductor, Inc |
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63 / 680 page  Chapter 1 MC9S12C and MC9S12GC Device Overview (MC9S12C128) Freescale Semiconductor MC9S12C-Family / MC9S12GC-Family 63 Rev 01.23 1.6.2 Resets Resets are a subset of the interrupts featured in Table 1-9. The different sources capable of generating a system reset are summarized in Table 1-10. When a reset occurs, MCU registers and control bits are changed to known start-up states. Refer to the respective module Block User Guides for register reset states. 1.6.2.1 Reset Summary Table 1.6.2.2 Effects of Reset When a reset occurs, MCU registers and control bits are changed to known start-up states. Refer to the respective module Block User Guides for register reset states. Refer to the HCS12 Multiplexed External Bus Interface (MEBI) Block Guide for mode dependent pin configuration of port A, B and E out of reset. Refer to the PIM Block User Guide for reset configurations of all peripheral module ports. Refer to Figure 1-2 to Figure 1-6 footnotes for locations of the memories depending on the operating mode after reset. The RAM array is not automatically initialized out of reset. NOTE For devices assembled in 48-pin or 52-pin LQFP packages all non-bonded out pins should be configured as outputs after reset in order to avoid current drawn from floating inputs. Refer to Table 1-5 for affected pins. 1.7 Device Specific Information and Module Dependencies 1.7.1 PPAGE External paging is not supported on these devices. In order to access the 16K flash blocks in the address range 0x8000–0xBFFF the PPAGE register must be loaded with the corresponding value for this range. Refer to Table 1-11 for device specific page mapping. For all devices Flash Page 3F is visible in the 0xC000–0xFFFF range if ROMON is set. For all devices (except MC9S12GC16) Page 3E is also visible in the 0x4000–0x7FFF range if ROMHM is cleared and ROMON is set. For all devices apart from MC9S12C32 Flash Page 3D is visible in the 0x0000–0x3FFF range if ROMON is set... Table 1-10. Reset Summary Reset Priority Source Vector Power-on Reset 1 CRG module 0xFFFE, 0xFFFF External Reset 1 RESET pin 0xFFFE, 0xFFFF Low Voltage Reset 1 VREG module 0xFFFE, 0xFFFF Clock Monitor Reset 2 CRG module 0xFFFC, 0xFFFD COP Watchdog Reset 3 CRG module 0xFFFA, 0xFFFB |
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