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SCANSTA112VS Datasheet(PDF) 7 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor. Click here to check the latest version.
Part # SCANSTA112VS
Description  7-Port Multidrop IEEE 1149.1 (JTAG) Multiplexer
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

SCANSTA112VS Datasheet(HTML) 7 Page - National Semiconductor (TI)

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TABLE 1. Pin Descriptions (Continued)
Pin Name
Description
No.
Pins
I/O
TRIST
B0, TRISTB1,
TRIST
(01-03)
5
O
TRI-STATE NOTIFICATION OUTPUT: This signal is asserted high when the associated
TDO is TRI-STATEd. Associated means TRIST
B0 is for TDOB0, TRIST01 is for TDO01, etc.
This output has 12mA of drive current.
A0
B0,A1B0,A0B1,
A1
B1
4
I
BACKPLANE PASS-THROUGH INPUT: A general purpose input which is driven to the Y
n of
a single selected LSP. (Not available when multiple LSPs are selected). This input has a
25K
Ω internal pull-up resistor. MPsel
B1/B0 determines which port is the master backplane
port and which is LSP
00.
Y0
B0,Y1B0,Y0B1,
Y1
B1
4
O
BACKPLANE PASS-THROUGH OUTPUT: A general purpose output which is driven from
the A
n of a single selected LSP. (Not available when multiple LSPs are selected). This
TRI-STATE output has 12mA of drive current. MPsel
B1/B0 determines which port is the
master backplane port and which is LSP
00.
S
(0-7)
8
I
SLOT IDENTIFICATION: The configuration of these pins is used to identify (assign a unique
address to) each ’STA112 on the system backplane
OE
1
I
OUTPUT ENABLE for the Local Scan Ports, active low. When high, this active-low control
signal TRI-STATEs all local scan ports on the ’STA112, to enable an alternate resource to
access one or more of the local scan chains.
TDO
(01-06)
6
O
TEST DATA OUTPUTS: Individual output for each of the local scan ports . These
TRI-STATE outputs have 12mA of drive current.
TDI
(01-06)
6
I
TEST DATA INPUTS: Individual scan data input for each of the local scan ports. This input
has a 25K
Ω internal pull-up resistor.
TMS
(01-06)
6
O
TEST MODE SELECT OUTPUTS: Individual output for each of the local scan ports. TMS
n
does not provide a pull-up resistor (which is assumed to be present on a connected TMS
input, per the IEEE 1149.1 requirement) . These TRI-STATE outputs have 24mA of drive
current.
TCK
(01-06)
6
O
LOCAL TEST CLOCK OUTPUTS: Individual output for each of the local scan ports. These
are buffered versions of TCK
B . These TRI-STATE outputs have 24mA of drive current.
TRST
(01-06)
6
O
LOCAL TEST RESETS: A gated version of TRST
B. These TRI-STATE outputs have 24mA
of drive current.
A0
01,A101
2
I
LOCAL PASS-THROUGH INPUTS: General purpose inputs which can be driven to the
backplane pin Y
B. (Only on LSP0 and LSP1. Only available when a single LSP is selected) .
These inputs have a 25K
Ω internal pull-up resistor.
Y0
01,Y101
2
O
LOCAL PASS-THROUGH OUTPUT: General purpose outputs which can be driven from the
backplane pin A
B. (Only on LSP0 and LSP1. Only available when a single LSP is selected) .
These TRI-STATE outputs have 12mA of drive current.
Note 1: Refer to the IBIS model on our website for I/O characteristics.
Application Overview
ADDRESSING SCHEME
The SCANSTA112 architecture extends the functionality of
the IEEE 1149.1 Standard by supplementing that protocol
with an addressing scheme which allows a test controller to
communicate with specific ’STA112s within a network of
’STA112s. That network can include both multi-drop and
hierarchical connectivity. In effect, the ’STA112 architecture
allows a test controller to dynamically select specific portions
of such a network for participation in scan operations. This
allows a complex system to be partitioned into smaller
blocks for testing purposes. The ’STA112 provides two levels
of test-network partitioning capability. First, a test controller
can select individual ’STA112s, specific sets of ’STA112s
(multi-cast groups), or all ’STA112s (broadcast). This
’STA112-selection process is supported by a Level-1 com-
munication protocol. Second, within each selected ’STA112,
a test controller can select one or more of the chip’s seven
local scan-ports. That is, individual local ports can be se-
lected for inclusion in the (single) scan-chain which a
’STA112 presents to the test controller. This mechanism
allows a controller to select specific scan-chains within the
overall scan network. The port-selection process is sup-
ported by a Level-2 protocol.
HIERARCHICAL SUPPORT
Multiple SCANSTA112’s can be used to assemble a hierar-
chical boundary-scan tree. In such a configuration, the sys-
tem tester can configure the local ports of a set of ’STA112s
so as to connect a specific set of local scan-chains to the
active scan chain. Using this capability, the tester can selec-
tively communicate with specific portions of a target system.
The tester’s scan port is connected to the backplane scan
port of a root layer of ’STA112s, each of which can be
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7


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