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TLV320AIC31IRHBTG4 Datasheet(PDF) 7 Page - Burr-Brown (TI) |
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TLV320AIC31IRHBTG4 Datasheet(HTML) 7 Page - Burr-Brown (TI) |
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7 / 77 page  www.ti.com AUDIO DATA SERIAL INTERFACE TIMING DIAGRAM WCLK SDOUT BCLK SDIN td(WS) td(DO-WS) td(DO-BCLK) ts(DI) th(DI) TLV320AIC31 SLAS497A – AUGUST 2006 – REVISED SEPTERMBER 2006 ELECTRICAL CHARACTERISTICS (continued) At 25 °C, AVDD, DRVDD, IOVDD = 3.3 V, DVDD = 1.8 V, Fs = 48-kHz, 16-bit audio data (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Channel separation 1 kHz, 0 dB input 96 dB Power supply rejection ratio 217 Hz, 100 mVpp on AVDD, DRVDD1/2 48 dB Mute attenuation 1-kHz output 107 dB DIGITAL I/O 0.3 × VIL Input low level IIL = +5-µA –0.3 V IOVDD 0.7 × VIH Input high level(6) IIH = +5-µA V IOVDD 0.1 × VOL Output low level IIH = 2 TTL loads V IOVDD 0.8 × VOH Output high level IOH = 2 TTL loads V IOVDD SUPPLY CURRENT Fs = 48-kHz AVDD+DRVDD 3.0 Fs = 48-kHz, PLL off, headphone Stereo line playback mA drivers off, DAC Direct Mode DVDD 2.0 AVDD+DRVDD 2.3 Mono record Fs = 48-kHz, PLL and AGC off mA DVDD 1.1 AVDD+DRVDD 4.3 Stereo record Fs = 48-kHz, PLL and AGC off mA DVDD 1.3 AVDD+DRVDD 1.3 Additional power consumed when PLL mA PLL is powered DVDD 0.9 AVDD+DRVDD Analog bypass to single-ended 1.5 Headphone amplifier headphones, DAC and PLL off, no mA DVDD 0 signal applied AVDD+DRVDD All supply voltages applied, all 0.1 Power down blocks programmed in lowest µA DVDD 0.5 power state (6) When IOVDD < 1.6V, minimum VIH is 1.1V. Figure 2. I2S/LJF/RJF Timing in Master Mode 7 Submit Documentation Feedback |
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