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PCM1870 Datasheet(PDF) 30 Page - Burr-Brown (TI) |
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PCM1870 Datasheet(HTML) 30 Page - Burr-Brown (TI) |
30 / 49 page www.ti.com PCM1870 SLAS544 – MAY 2007 Register 84–86 B15 B14 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 Register 84 0 IDX6 IDX5 IDX4 IDX3 IDX2 IDX1 IDX0 RSV RSV RSV RSV RSV MSTR RSV BIT0 Register 85 0 IDX6 IDX5 IDX4 IDX3 IDX2 IDX1 IDX0 SRST RSV NPR5 NPR4 NPR3 NPR2 NPR1 NPR0 Register 86 0 IDX6 IDX5 IDX4 IDX3 IDX2 IDX1 IDX0 MBST MSR2 MSR1 MSR0 RSV RSV RSV ZCRS IDX[6:0]: 101 0100b (54h) Register 84 IDX[6:0]: 101 0101b (55h) Register 85 IDX[6:0]: 101 0110b (56h) Register 86 MSTR: Master or Slave Selection for Audio Interface Default value: 0 This bit is used to select either master or slave mode for the audio interface. In master mode, PCM1870 generates LRCK and BCK from the system clock. In slave mode, it receives LRCK and BCK from another device. MSTR = 0 Slave interface (default) MSTR = 1 Master interface BIT0: Bit Length Selection for Audio Interface Default value: 1 This bit is used to select data bit length for the ADC output. BIT0 = 0 Reserved BIT0 = 1 16 bits (default) SRST: System Reset Default value: 0 This bit is used to enable system reset. All circuits are reset by setting SRST = 1. After completing the reset sequence, SRST resets to 0 automatically. SRST = 0 Reset disabled (default) SRST = 1 Reset enabled NPR[5:0]: System Clock Rate Selection Default value: 00 0000 These bits are used to select the system clock rate. See Table 8 for details. MBST: BCK Output Configuration in Master Mode Default value: 0 This bit is used to control the BCK output configuration in master mode. VIO (I/O cell power supply) power consumption can be reduced by adjusting BCK edge to bit number when setting MBST = 1. This is effective in master mode (register 69 MSTR = 1). MBST = 0 Normal Output (default) MBST = 1 Burst output 30 Submit Documentation Feedback |
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