IS61C256AL_06 datasheet(7/12 Pages) ISSI | 32K x 8 HIGH-SPEED CMOS STATIC RAM

Part #	IS61C256AL

Description	32K x 8 HIGH-SPEED CMOS STATIC RAM

Download	12 Pages

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Manufacturer	ISSI [Integrated Silicon Solution, Inc]

Direct Link	http://www.issi.com

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7 / 12 page

Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774

7

Rev. B

10/23/06

IS61C256AL

ISSI®

WRITE CYCLE NO. 2 (OE is HIGH During Write Cycle) (1,2)

WRITE CYCLE NO. 3 (OE is LOW During Write Cycle) (1)

Notes:

1. The internal write time is defined by the overlap of

CE LOW and WE LOW. All signals must be in valid states to initiate a Write,

but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling

edge of the signal that terminates the Write.

2. I/O will assume the High-Z state if

OE

≥ VIH.

DATA UNDEFINED

LOW

t WC

VALID ADDRESS

t PWE1

t AW

t HA

HIGH-Z

t HD

t SA

t HZWE

ADDRESS

CE

WE

DOUT

DIN

OE

DATAIN VALID

t LZWE

t SD

CE_WR2.eps

DATA UNDEFINED

t WC

VALID ADDRESS

LOW

t PWE2

t AW

t HA

HIGH-Z

t HD

t SA

t HZWE

ADDRESS

CE

WE

DOUT

DIN

OE

DATAIN VALID

t LZWE

t SD

CE_WR3.eps

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IS61C256AL Datasheet(PDF) 7 Page - Integrated Silicon Solution, Inc

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