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PCK2023DL Datasheet(PDF) 8 Page - NXP Semiconductors |
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PCK2023DL Datasheet(HTML) 8 Page - NXP Semiconductors |
8 / 30 page Philips Semiconductors Product data PCK2023 CK408 (66/100/133/200 MHz) spread spectrum differential system clock generator 2001 Sep 07 8 AC CHARACTERISTICS VDD3 = 3.3 V –5%; fcrystal = 14.31818 MHz 3V66 66 MHz TIMING REQUIREMENTS SYMBOL PARAMETER LIMITS Tamb = 0 to +70 °C UNIT NOTES MIN MAX TPERIOD period 15.0 15.3 ns 8, 13 tHIGH HIGH time 4.95 N/A ns 9 tLOW LOW time 4.55 N/A ns 10 tRISE rise time 0.5 2.0 ns 12 tFALL fall time 0.5 2.0 ns 12 tJITTER cycle-to-cycle jitter — 250 ps Edge rate rising edge rate 1.0 4.0 V/ns 12 Edge rate falling edge rate 1.0 4.0 V/ns 12 tSKEW pin-to-pin skew 3V66 [1:0] 0.0 250 ps tSKEW pin-to-pin skew 3V66 [5:2] 0.0 250 ps tSKEW pin-to-pin skew 3V66 [5:0] 0.0 450 ps 66 MHz BUFFERED TIMING REQUIREMENTS SYMBOL PARAMETER LIMITS Tamb = 0 to +70 °C UNITS NOTES MIN MAX tRISE rise time 0.5 2.0 ns 12 tFALL fall time 0.5 2.0 ns 12 tPD propagation delay from 66In to 66BUFF [2:0] 2.5 4.5 ns Edge rate rising edge rate 1.0 4.0 V/ns 12 Edge rate falling edge rate 1.0 4.0 V/ns 12 tSKEW 66 MHz buffered pin-to-pin skew 0.0 175 ps PCIF/PCI AC TIMING REQUIREMENTS SYMBOL PARAMETER LIMITS Tamb = 0 to +70 °C UNITS NOTES MIN MAX TPERIOD period 30.0 N/A ns 8, 13 tHIGH HIGH time 12.0 N/A ns 9 tLOW LOW time 12.0 N/A ns 10 tRISE rise time 0.5 2.0 ns 12 tFALL fall time 0.5 2.0 ns 12 tJITTER cycle-to-cycle jitter — — ps Edge rate rising edge rate 1.0 4.0 V/ns 12 Edge rate falling edge rate 1.0 4.0 V/ns 12 tSKEW pin-to-pin skew 0.0 500 ps tPCI 3V66 [5:0] leads 33 MHz PCI 1.5 3.5 ns |
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Similar Description - PCK2023DL |
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