Integrated Silicon Solution, Inc. — 1-800-379-4774

3

ADVANCE INFORMATION

Rev. 00E

04/10/03

IS23SC1604

ISO

PAD

PAD Name

Description

C1

8

Vcc

Supply Voltage

C2

7

RST

Reset

C3

6

CLK

Serial Clock and Address Control

C4

5

FUS

Security Fuse Pad

C5

4

GND

Ground

C6

3

NC

No Connect

C7

2

I/O

Bi-directional Data

C8

1

PGM

Programming Control

Note:

1. Pins CLK, FUS, and PGM have internal pull-downs. Pin RST has an internal pull-up.

PIN DESCRIPTIONS

Symbol

Card Contact

Name and Function

Vcc

C1

Supply Voltage

RST

C2

Reset: The device’s RST pin can be used to clear the internal address counter.

When CLK is LOW, a HIGH-to-LOW transition on RST resets the address

counter to zero, and the first bit of memory will be output on I/O after the

falling edge of RST. Also, the RST pin can be used to place the device in low

power standby mode by placing RST in HIGH logic state and both PGM and

FUS in LOW logic state. While RST is HIGH, the internal address counter will

not be incremented with CLK.

CLK

C3

Serial Clock and Address Control: This is the device data clock pin. It is

used to clock data bits into and out of the device. It also increments the

internal address counter.

FUS

C4

Security Fuse Pad: This pin is used by card issuer to personalize the device

before releasing it to the customer. When FUS pin is driven to logic HIGH state

and the state of the internal security fuse is HIGH (not blown), the issuer can

personalize the entire content of the memory with successful Security Code

(SC) validation. When FUS pin is driven to logic LOW state and the state of

the internal security fuse is HIGH (not blown), the full protection of the memory

is enabled and the security features of the device can be tested by the issuer.

After the device personalization is completed, the issuer should blow the

internal security fuse to logic LOW state so that the full protection of the

memory will always be enabled regardless of the state on FUS pin. (Refer to

IS23SC1604 Security Levels and also Blowing Internal Security Fuse.)

GND

C5

Ground

NC

C6

No Connect

I/O

C7

Serial Data Input and Output: This pin is where the data bit is shifted in and

out of the device when a clock pulse is applied to CLK pin.

PGM

C8

Programming Control: This pin is asserted HIGH to initiate memory write or

erase operation.