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ECLTSSOP20EVB Datasheet(PDF) 2 Page - ON Semiconductor

Part No. ECLTSSOP20EVB
Description  Evaluation Board Manual for High Frequency TSSOP 20
Download  18 Pages
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Maker  ONSEMI [ON Semiconductor]
Homepage  http://www.onsemi.com
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ECLTSSOP20EVB Datasheet(HTML) 2 Page - ON Semiconductor

 
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ECLTSSOP20EVB
http://onsemi.com
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Figure 2. Bottom View of the 20-lead TSSOP Evaluation Board
Bottom View
Expanded Bottom View
Figure 3. Evaluation Board Lay-up
LAY-UP DETAIL
4 LAYER
LAYER 1 (TOP SIDE) 1 OZ
ROGERS 4003 0.008 in
LAYER 2 (GROUND PLANE P1) 1 OZ
FR-4 0.020 in
LAYER 3 (GROUND, VCC & VEE, PLANE P2) 1 OZ
FR-4 0.025 in
LAYER 4 (BOTTOM SIDE) 1 OZ
SILKSCREEN (TOP SIDE)
0.062
$ 0.007
Board Layout
The 20-lead TSSOP evaluation board was designed to be
versatile and accommodate several different configurations.
The input, output, and power pin layout of the evaluation
board is shown in Figures 4 and 5. The evaluation board has
at least eight possible configurable options. Table 1, list the
devices and the relevant configuration that utilizes this PCB
board. Lists of components and simple schematics are
located in Figures 6 through 12. Place SMA connectors on
J1 through J20, 50
W chip resistors between ground pad and
Pin 1 pad through Pin 20 pad, and chip capacitors C1 through
C5 according to configuration figures. (C4 and C5 are 0.01
mF and C1, C2, and C3 are 0.1 mF); (See Figure 5).


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