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PCA9557 Datasheet(PDF) 2 Page - NXP Semiconductors

Part No. PCA9557
Description  8-bit I2C and SMBus I/0 port with reset
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Maker  PHILIPS [NXP Semiconductors]
Homepage  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

PCA9557 Datasheet(HTML) 2 Page - NXP Semiconductors

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Philips Semiconductors
Product data
PCA9557
8-bit I2C and SMBus I/0 port with reset
2
2001 Dec 12
853-2308 27449
FEATURES
Lower voltage, higher performance migration path for the
PCA9556
8 general purpose input/output expander/collector
Input/output configuration register
Active HIGH polarity inversion register
I2C and SMBus interface logic
Internal power-on reset
Noise filter on SCL/SDA inputs
Active LOW reset input
3 address pins allowing up to 8 devices on the I2C/SMBus
High impedance open drain on I/O0
No glitch on power-up
Power-up with all channels configured as inputs
Low standby current
Operating power supply voltage range of 2.3 V to 5.5 V
5 V tolerant inputs/outputs
0 to 400 kHz clock frequency
ESD protection exceeds 2000 V HBM per JESD22-A114,
200 V MM per JESD22-A115 and 1000 V CDM per JESD22-C101
Latch-up testing is done to JESDEC Standard JESD78 which
exceeds 100 mA
Package offer: SO 16, TSSOP 16
DESCRIPTION
The PCA9557 is a silicon CMOS circuit which provides parallel
input/output expansion for SMBus and I2C applications. The
PCA9557 consists of an 8-bit input port register, 8-bit output port
register, and an I2C/SMBus interface. It has low current
consumption and a high impedance open drain output pin, I/O0.
The system master can enable the PCA9557’s I/O as either input or
output by writing to the configuration register.
The system master can also invert the PCA9557 inputs by writing to
the active HIGH polarity inversion register.
Finally, the system master can reset the PCA9557 in the event of a
timeout by asserting a LOW in the reset input.
The power-on reset puts the registers in their default state and
initializes the I2C/SMBus state machine. The RESET pin causes the
same reset/initialization to occur without depowering the part.
PIN CONFIGURATION
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
su01045
SCL
SDA
A0
A1
A2
I/O0
I/O1
VSS
VDD
RESET
I/O7
I/O6
I/O5
I/O4
I/O3
I/O2
Figure 1. Pin configuration
PIN DESCRIPTION
PIN
NUMBER
SYMBOL
FUNCTION
1
SCL
Serial clock line
2
SDA
Serial data line
3
A0
Address input 0
4
A1
Address input 1
5
A2
Address input 2
6
I/O0
I/O0 (open drain)
7
I/O1
I/O1
8
VSS
Supply ground
9
I/O2
I/O2
10
I/O3
I/O3
11
I/O4
I/O4
12
I/O5
I/O5
13
I/O6
I/O6
14
I/O7
I/O7
15
RESET
Active low reset input
16
VDD
Supply voltage
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
ORDER CODE
DRAWING NUMBER
16-Pin Plastic SO (narrow)
–40 to +85
°C
PCA9557D
SOT109-1
16-Pin Plastic TSSOP
–40 to +85
°C
PCA9557PW
SOT403-1
Standard packing quantities and other packaging data is available at www.philipslogic.com/packaging.
SMBus as specified by the Smart Battery System Implementers Forum is a derivative of the Philips I2C patent.
I2C is a trademark of Philips Semiconductors Corporation.


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