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SN74AUP1G74 Datasheet(PDF) 1 Page - Texas Instruments

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Part No. SN74AUP1G74
Description  LOW-POWER SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET
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Maker  TI [Texas Instruments]
Homepage  http://www.ti.com
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SN74AUP1G74 Datasheet(HTML) 1 Page - Texas Instruments

 
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FEATURES
CLR
3
2
5
8
1
CLK
VCC
D
GND
DCT PACKAGE
(TOP VIEW)
YEP OR YZP PACKAGE
(BOTTOM VIEW)
DCU PACKAGE
(TOP VIEW)
3
2
4
5
1
CLK
VCC
PRE
D
GND
D
GND
VCC
Q
Q
See mechanical drawings for dimensions.
2
5
3
4
8
Q
CLR
Q
Q
PRE
Q
4
6
7
6
7
8
6
1
7
CLK
CLR
PRE
DESCRIPTION/ORDERING INFORMATION
SN74AUP1G74
LOW-POWER SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP
WITH CLEAR AND PRESET
SCES644A – MARCH 2006 – REVISED SEPTEMBER 2006
Available in the Texas Instruments
Optimized for 3.3-V Operation
NanoStar™ and NanoFree™ Packages
3.6-V I/O Tolerant to Support Mixed-Mode
Low Static-Power Consumption:
Signal Operation
I
CC = 0.9 µA Max
t
pd = 4.3 ns Max at 3.3 V
Low Dynamic-Power Consumption:
Suitable for Point-to-Point Applications
C
pd = 4.3 pF Typ at 3.3 V
Latch-Up Performance Exceeds 100 mA Per
Low Input Capacitance: C
i = 1.5 pF Typ
JESD 78, Class II
Low Noise – Overshoot and Undershoot
ESD Performance Tested Per JESD 22
<10% of V
CC
– 2000-V Human-Body Model
I
off Supports Partial-Power-Down Mode
(A114-B, Class II)
Operation
– 200-V Machine Model (A115-A)
Schmitt-Trigger Action Allows Slow Input
– 1000-V Charged-Device Model (C101)
Transition and Better Switching Noise
ESD Protection Exceeds
±5000 V With
Immunity at the Input (V
hys = 250 mV Typ at
Human-Body Model
3.3 V)
Wide Operating V
CC Range of 0.8 V to 3.6 V
The AUP family is TI's premier solution to the industry's low-power needs in battery-powered portable
applications. This family ensures a very low static- and dynamic-power consumption across the entire VCC range
of 0.8 V to 3.6 V, resulting in increased battery life (see Figure 1). This product also maintains excellent signal
integrity (see the very low undershoot and overshoot characteristics shown in Figure 2).
ORDERING INFORMATION
TA
PACKAGE(1)
ORDERABLE PART NUMBER
TOP-SIDE MARKING(2)
NanoStar™ – WCSP (DSBGA)
Reel of 3000
SN74AUP1G74YEPR
0.23-mm Large Bump – YEP
_ _ _HS_
NanoFree™ – WCSP (DSBGA)
Reel of 3000
SN74AUP1G74YZPR
–40
°C to 85°C
0.23-mm Large Bump – YZP (Pb-free)
SSOP – DCT
Reel of 3000
SN74AUP1G74DCTR
H74_ _ _
VSSOP – DCU
Reel of 3000
SN74AUP1G74DCUR
H74_
(1)
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
(2)
DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site.
DCU: The actual top-side marking has one additional character that designates the assembly/test site.
YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following
character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb,
• = Pb-free).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar, NanoFree are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright © 2006, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.


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