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SN74AUP1G74 Datasheet(PDF) 4 Page - Texas Instruments

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Part No. SN74AUP1G74
Description  LOW-POWER SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET
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Maker  TI [Texas Instruments]
Homepage  http://www.ti.com
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SN74AUP1G74 Datasheet(HTML) 4 Page - Texas Instruments

 
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Recommended Operating Conditions
(1)
SN74AUP1G74
LOW-POWER SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP
WITH CLEAR AND PRESET
SCES644A – MARCH 2006 – REVISED SEPTEMBER 2006
MIN
MAX
UNIT
VCC
Supply voltage
0.8
3.6
V
VCC = 0.8 V
VCC
VCC = 1.1 V to 1.95 V
0.65
× V
CC
VIH
High-level input voltage
V
VCC = 2.3 V to 2.7 V
1.6
VCC = 3 V to 3.6 V
2
VCC = 0.8 V
0
VCC = 1.1 V to 1.95 V
0.35
× V
CC
VIL
Low-level input voltage
V
VCC = 2.3 V to 2.7 V
0.7
VCC = 3 V to 3.6 V
0.9
VI
Input voltage
0
3.6
V
VO
Output voltage
0
VCC
V
VCC = 0.8 V
–20
µA
VCC = 1.1 V
–1.1
VCC = 1.4 V
–1.7
IOH
High-level output current
VCC = 1.65
–1.9
mA
VCC = 2.3 V
–3.1
VCC = 3 V
–4
VCC = 0.8 V
20
µA
VCC = 1.1 V
1.1
VCC = 1.4 V
1.7
IOL
Low-level output current
VCC = 1.65 V
1.9
mA
VCC = 2.3 V
3.1
VCC = 3 V
4
∆t/∆v
Input transition rise or fall rate
VCC = 0.8 V to 3.6 V
200
ns/V
TA
Operating free-air temperature
–40
85
°C
(1)
All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
4
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