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FEATURES

DESCRIPTION

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

1B

1A

1Y

G

2Y

2A

2B

GND

4B

4A

4Y

G

3Y

3A

3B

SN65LVDT32B

1

2

3

4

8

7

6

5

1Y

2Y

GND

1A

1B

2A

2B

D PACKAGE

(TOP VIEW)

D PACKAGE

(TOP VIEW)

SN65LVDS32B

G

G

1A

1B

2A

2B

3A

3B

4A

4B

1Y

2Y

3Y

4Y

Logic Diagram

(positive logic)

SN65LVDT32B

ONLY (4 Places)

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

1B

1A

1Y

1,2EN

2Y

2A

2B

GND

4B

4A

4Y

3,4EN

3Y

3A

3B

SN65LVDT3486B

D PACKAGE

(TOP VIEW)

SN65LVDS3486B

1A

1B

2A

2B

3A

3B

4A

4B

1Y

2Y

3Y

4Y

Logic Diagram

(positive logic)

SN65LVDT3486B

ONLY (4 Places)

1,2EN

3,4EN

1A

1B

2A

2B

1Y

2Y

SN65LVDT9637B

ONLY

SN65LVDT9637B

SN65LVDS9637B

Logic Diagram

(positive logic)

SN65LVDS32B,, SN65LVDT32B

SN65LVDS3486B, SN65LVDT3486B

SN65LVDS9637B, SN65LVDT9637B

SLLS440B – OCTOBER 2000 – REVISED APRIL 2007

HIGH-SPEED DIFFERENTIAL RECEIVERS

• Meets or Exceeds the Requirements of ANSI

to 400 Mbps

• Operates With a Single 3.3-V Supply

• –2-V to 4.4-V Common-Mode Input Voltage

Range

• Differential Input Thresholds <50 mV With

50 mV of Hysteresis Over Entire Common-

Mode Input Voltage Range

• Integrated 110-Ω Line Termination Resistors

Offered With the LVDT Series

• Propagation Delay Times 4 ns (typ)

• Active Fail Safe Assures a High-Level Output

With No Input

• Bus-Pin ESD Protection Exceeds 15 kV HBM

• Inputs Remain High-Impedance on Power

Down

• Recommended Maximum Parallel Rate of

200 M-Transfer/s

• Available in Small-Outline Package With

1,27-mm Terminal Pitch

• Pin-Compatible With the AM26LS32, MC3486,

or µA9637

This

family

of

differential

line

receivers

offers

improved performance and features that implement

the electrical characteristics of low-voltage differential

signaling

(LVDS).

LVDS

is

defined

in

the

TIA/EIA-644 standard. This improved performance

represents

the

second

generation

of

receiver

products for this standard, providing a better overall

solution for the cabled environment. This generation

of products is an extension to TI's overall product

portfolio and is not necessarily a replacement for

older LVDS receivers.

(1)

Signaling rate, 1/t, where t is the minimum unit interval and is

expressed in the units bit/s (bits per second).

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Copyright © 2000–2007, Texas Instruments Incorporated

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.