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TPS61050 Datasheet(PDF) 5 Page - Texas Instruments |
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TPS61050 Datasheet(HTML) 5 Page - Texas Instruments |
5 / 45 page www.ti.com DEVICE INFORMATION I2C TIMING DIAGRAMS tf tLOW tr thd;STA thd;DAT tsu;DAT tf HIGH tsu;STA S Sr P S thd;STA tr tBUF tsu;STO SDA SCL PIN ASSIGMENTS TPS61050 TPS61052 SLUS525 – MARCH 2007 Figure 3. Serial Interface Timing for F/S-Mode TERMINAL FUNCTIONS TERMINAL I/O DESCRIPTION NO. NO. NAME (QFN) (CSP) AVIN 5 D3 I This is the input voltage pin of the device. Connect directly to the input bypass capacitor. VOUT 9 A2 O Boost converter output. LED 6 D2 I LED return input. This feedback pin regulates the LED current through the internal sense resistor by regulating the voltage across it. The regulation operates with typically 250 mV dropout voltage. Connect to the cathode of the LED. FLASH_SYNC 10 A1 I Flash strobe pulse synchronization input. FLASH_SYNC = LOW (GND): The device is operating and regulating the LED current to the torch current level (TC). FLASH_SYNC = HIGH (VIN): The device is operating and regulating the LED current to the flash current level (FC). SCL 2 B3 I Serial interface clock line. This pin must not be left floating and must be terminated. SDA 1 A3 I/O Serial interface address/data line. This pin must not be left floating and must be terminated. GPIO 3 C3 I/O General purpose input/output (refer to REGISTER2). This pin can either be configured as a logic input or as an open-drain output (TPS61050). ENVM 3 C3 I Enable pin for voltage mode boost converter (TPS61052). SW 8 B1, B2 I/O Inductor connection. Drain of the internal power MOSFET. Connect to the switched side of the inductor. SW is high impedance during shutdown. PGND 7 C1, C2 Power ground. Connect to AGND underneath IC. AGND 4 D1 Analog ground. PowerPAD™ N/A Internally connected to PGND. 5 Submit Documentation Feedback |
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