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TPS61050 Datasheet(PDF) 4 Page - Texas Instruments

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Part # TPS61050
Description  1.2-A HIGH POWER WHITE LED DRIVER 2-MHz SYNCHRONOUS BOOST CONVERTER WITH I2C COMPATIBLE INTERFACE
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TPS61050 Datasheet(HTML) 4 Page - Texas Instruments

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I2C INTERFACE TIMING CHARACTERISTICS
(1)
TPS61050
TPS61052
SLUS525 – MARCH 2007
ELECTRICAL CHARACTERISTICS (continued)
Unless otherwise noted the specification applies for V
IN = 3.6 V over an operating junction temp. of –40°C ≤ TJ ≤ 125°C.
Typical values are for T
A = 25°C.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
TIMING
From shutdown into torch mode ILED = 75 mA
1.2
ms
Start-up time
From shutdown into voltage mode via ENVM
650
µs
IOUT = 0 mA
LED current settling time(2) triggered by
MODE_CTRL[1:0] = 10,
400
µs
rising edge on FLASH_SYNC
ILED = from 0 mA to 900 mA
LED current settling time(2) triggered by
MODE_CTRL[1:0] = 10,
20
µs
TX mask
ILED = 900 mA to 150 mA
(2)
Settling time to
±15% of the target value
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Standard mode
100
fSCL
SCL clock frequency
kHz
Fast mode
400
Standard mode
4.7
tBUF
Bus free time between a STOP and START condition
µs
Fast mode
1.3
Standard mode
4.0
µs
tHD; tSTA
Hold time (repeated) START condition
Fast mode
600
ns
Standard mode
4.7
tLOW
LOW period of the SCL clock
µs
Fast mode
1.3
Standard mode
4.0
µs
tHIGH
HIGH period of the SCL clock
Fast mode
600
ns
Standard mode
4.7
µs
tSU; tSTA
Setup time for a repeated START condition
Fast mode
600
ns
Standard mode
250
tSU; tDAT
Data setup time
ns
Fast mode
100
Standard mode
0
3.45
tHD; tDAT
Data hold time
µs
Fast mode
0
0.9
Standard mode
20 + 0.1CB
1000
tRCL
Rise time of SCL signal
ns
Fast mode
20 + 0.1CB
300
Standard mode
20 + 0.1CB
1000
Rise time of SCL signal after a repeated START condition
tRCL1
ns
and after an acknowledge bit
Fast mode
20 + 0.1CB
1000
Standard mode
20 + 0.1CB
300
tFCL
Fall time of SCL signal
ns
Fast mode
20 + 0.1CB
300
Standard mode
20 + 0.1CB
1000
tRDA
Rise time of SDA signal
ns
Fast mode
20 + 0.1CB
300
Standard mode
20 + 0.1CB
300
tFDA
Fall time of SDA signal
ns
Fast mode
20 + 0.1CB
300
Standard mode
4.0
µs
tSU; tSTO
Setup time for STOP condition
Fast mode
600
ns
CB
Capacitive load for SDA and SCL
400
pF
(1)
Assured by design. Not tested in production.
4
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