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ISL6310 Datasheet(PDF) 16 Page - Intersil Corporation

Part No. ISL6310
Description  Two-Phase Buck PWM Controller with High Current Integrated MOSFET Drivers
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Maker  INTERSIL [Intersil Corporation]
Homepage  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

ISL6310 Datasheet(HTML) 16 Page - Intersil Corporation

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December 12, 2006
Power Good Signal
The power good pin (PGOOD) is an open-drain logic output
that transitions high when the converter is operating after
soft-start. PGOOD pulls low during shutdown and releases
high after a successful soft-start. PGOOD transitions low
when an undervoltage, overvoltage, or overcurrent condition
is detected or when the controller is disabled by a reset from
ENLL or POR. If after an undervoltage or overvoltage event
occurs the output returns to within under and overvoltage
limits, PGOOD will return high.
Undervoltage Detection
The undervoltage threshold is set at 82% of the REF
voltage. When the output voltage (VSEN-RGND) is below
the undervoltage threshold, PGOOD gets pulled low. No
other action is taken by the controller. PGOOD will return
high if the output voltage rises above 85% of the REF
Overvoltage Protection
The ISL6310 constantly monitors the difference between the
VSEN and RGND voltages to detect if an overvoltage event
occurs. During soft-start, while the DAC/REF is ramping up,
the overvoltage trip level is the higher of REF plus 150mV or a
fixed voltage, VOVP. The fixed voltage, VOVP, is 1.67V. Upon
successful soft-start, the overvoltage trip level is only REF
plus 150mV. OVP releases 50mV below its trip point if it was
“REF plus 150mV” that tripped it, and releases 100mV below
its trip point if it was the fixed voltage, VOVP, that tripped it.
Actions are taken by the ISL6310 to protect the load when an
overvoltage condition occurs, until the output voltage falls
back within set limits.
At the inception of an overvoltage event, all LGATE signals
are commanded high, and the PGOOD signal is driven low.
This causes the controller to turn on the lower MOSFETs
and pull the output voltage below a level that might cause
damage to the load. The LGATE outputs remain high until
VDIFF falls to within the overvoltage limits explained above.
The ISL6310 will continue to protect the load in this fashion
as long as the overvoltage condition recurs.
Once an overvoltage condition ends the ISL6310 continues
normal operation and PGOOD returns high.
Pre-POR Overvoltage Protection
Prior to PVCC and VCC exceeding their POR levels, the
ISL6310 is designed to protect the load from any overvoltage
events that may occur. This is accomplished by means of an
internal 10k
Ω resistor tied from PHASE to LGATE, which
turns on the lower MOSFET to control the output voltage
until the overvoltage event ceases or the input power supply
cuts off. For complete protection, the low side MOSFET
should have a gate threshold well below the maximum
voltage rating of the load/microprocessor.
In the event that during normal operation the PVCC or VCC
voltage falls back below the POR threshold, the pre-POR
overvoltage protection circuitry reactivates to protect from
any more pre-POR overvoltage events
Open Sense Line Protection
In the case that either of the remote sense lines, VSEN or
GND, become open, the ISL6310 is designed to detect this
and shut down the controller. This event is detected by
monitoring the voltage on the IREF pin, which is a local
version of VOUT sensed at the outputs of the inductors.
If VSEN or RGND become opened, VDIFF falls, causing the
duty cycle to increase and the output voltage on IREF to
increase. If the voltage on IREF exceeds “VDIFF+1V”, the
controller will shut down. Once the voltage on IREF falls
below “VDIFF+1V”, the ISL6310 will restart at the beginning
of soft-start.
Overcurrent Protection
The ISL6310 detects overcurrent events by comparing the
droop voltage, VDROOP, to the OCSET voltage, VOCSET, as
shown in Figure 13. The droop voltage, set by the external
current sensing circuitry, is proportional to the output current
as shown in Equation 8. A constant 100
μA flows through
ROCSET, creating the OCSET voltage. When the droop
voltage exceeds the OCSET voltage, the overcurrent
protection circuitry activates. Since the droop voltage is
DAC + 150mV
0.82 x DAC
*Connect DROOP to IREF
to disable the Droop feature

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