 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
ISL6422ERZ Datasheet(PDF) 10 Page - Intersil Corporation |
|
||||||||||||||||||||||||||||||
ISL6422ERZ Datasheet(HTML) 10 Page - Intersil Corporation |
|
|
10 / 19 page  10 FN9190.1 April 10, 2007 Functional Description The ISL6422 dual output voltage regulator makes an ideal choice for advanced satellite set-top box and personal video recorder applications. Both supply and control voltage outputs for two low-noise blocks (LNBs) are available simultaneously in any output configuration. The device utilizes built-in DC/DC step up converters that, from a single supply source ranging from 8V to 14V, generate the voltages that enable the linear post-regulators to work with a minimum of dissipated power. An undervoltage lockout circuit disables the device when VCC drops below a fixed threshold (7.5V typical). DiSEqC Encoding The internal oscillator is factory-trimmed to provide a tone of 22kHz in accordance with DiSEqC (EUTELSAT) standards. No further adjustment is required. The tone oscillator can be controlled either by the I2C interface (ENT1 or ENT2 bit) or by a dedicated pin (EXTM1 or EXTM2) that allows immediate DiSEqC data encoding separately for each LNB. All the functions of this IC are controlled via the I2C bus by writing to the system registers. The same registers can be read back, and four bits will report the diagnostic status. The internal oscillator operates the converters at twenty times the 22k tone frequency. The device offers full I2C compatibility and supports 2.5V, 3.3V or 5V logic, and up to 400kHz operation. If the Tone Enable bits (ENT1 and ENT2) are set LOW and the MSEL1 and MSEL2 bits set LOW through I2C, then the EXTM1 and EXTM2 terminal activates the internal tone signal, modulating the DC output with a 680mVpp typ symmetrical tone waveform. The presence of this signal usually provides the LNB with information about the band to be received. Burst coding of the tone can be accomplished due to the fast response of the EXTM1 and EXTM2 input and rapid tone response. This allows implementation of the DiSEqC (EUTELSAT) protocols. When the ENT1 or ENT2 bit is set HIGH, a continuous 22kHz tone is generated regardless of the EXTM1 and EXTM2 pin logic status for the corresponding regulator channel (LNB-A or LNB-B). The ENT1 or ENT2 bit must be set LOW when the EXTM1 and/or EXTM2 pin is used for DiSEqC encoding. The EXTM1 and EXTM2 pins also accept an externally modulated tone command when the MSEL1 or MSEL2 I2C bit is set high. DiSEqC Decoder TDIN1 and TDIN2 are the inputs to the tone decoders of channels 1 and 2 respectively. They accept the tone signal derived from the VOUT through the 10nF decoupling capacitor. The detector threshold can be set to 200mV maximum in the Receive mode and to 400mV minimum in the Transmit mode by means of the logic presented to the TXT1 or TXT2 pin. If tone is detected, the open drain pin TDOUT1 or TDOUT2 is asserted low. This also enables the tone diagnostics to be performed, apart from the normal tone detection function. Linear Regulator The output linear regulator will sink and source current. This feature allows full modulation capability into capacitive loads as high as 0.75µF. In order to minimize the power dissipation, the output voltage of the internal step-up converter is adjusted to allow the linear regulator to work at minimum dropout. When the device is put in the shutdown mode (EN1 and EN2 = LOW), both PWM power blocks are disabled (that is, when EN1 = 0, PWM1 is disabled, and when EN2 = 0, PWM2 is disabled). When the regulator blocks are active (EN1 and EN2 = HIGH, and VSPEN1 and VSPEN2 = LOW), the output can be controlled via I2C logic to be between 13V and 14V or between 18V and 19V (typical) by means of the Voltage Select bits (VTOP1, VTOP2, VBOT1, and VBOT2) for remote controlling of non-DiSEqC LNBs. When the regulator blocks are active (EN1 and EN2 = HIGH, and VSPEN1 and VSPEN2 = HIGH), the VBOT1 and VBOT2 bits and the SELVTOP1 and SELVTOP2 pins will control the output between 13V and 14V and the VTOP1 and VTOP2 and the SELVTOP1 and SELVTOP2 pins will control the output between 18V and 19V. Output Timing The output voltage rise and fall times can be set by an the external capacitor on the TCAP1 and TCAP2 pins. The output rise and fall times is given by Equation 1: where: • C is the TCAP value in nF • T is the required slew rate in ms, and • ΔV is the differential transition voltage from low output voltage range to the high output range in Volts. Rise and fall time will typically be the same. The maximum recommended value for TCAP1 and TCAP2 would be the base on the maximum transition time allowed in the system application. Too small a value of TCAP1 and TCAP2 can cause high peak currents in the boost circuit. For example, a 10V/mS slew on a 80µF VSW capacitor with an inductor of 15µH can cause a peak inductor current of approximately 2.3A C 270 ()T ΔV ------------------- = (EQ. 1) ISL6422 |
Similar Part No. - ISL6422ERZ |
|
Similar Description - ISL6422ERZ |
|
|
|
Link URL |
| Privacy Policy |
| ALLDATASHEET.COM |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
