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FMS3818 Datasheet(PDF) 2 Page - Fairchild Semiconductor |
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FMS3818 Datasheet(HTML) 2 Page - Fairchild Semiconductor |
2 / 13 page FMS3818 DATA SHEET 2 REV. 1.2.3 December 2004 Functional Description Within the FMS3818 are three identical 8-bit D/A converters, each with a current source output. External loads are required to convert these currents to voltage outputs. Data inputs RGB7-0 are overridden by the BLANK input. SYNC = H activates sync current from IOS for sync-on- green video signals. Figure 1. FMS3818 Current Source Structure Digital Inputs Incoming GBR data is registered on the rising edge of the clock input, CLK. Analog outputs follow the rising edge of CLK after a delay, tDO. SYNC and BLANK SYNC and BLANK inputs control the output level (Figure 1 and Table 1) of the D/A converters during CRT retrace intervals. BLANK forces the D/A outputs to the blanking level while SYNC = L turns off a current source, IOS that is connected to the green D/A converter. SYNC = H adds a 112/256 fraction of full-scale current to the green output. SYNC = L extinguishes the sync current during the sync tip. Figure 2. Nominal Output Levels BLANK gates the D/A inputs. If BLANK = H, the D/A inputs control the output currents to be added to the output blanking level. If BLANK = L, data inputs and the pedestal are disabled. D/A Outputs Each D/A output is a current source from the VDDA supply. Expressed in current units, the GBR transformation from data to current is as follows: G = G7-0 & BLANK + SYNC * 112 B = B7-0 & BLANK R = R7-0 & BLANK Typical LSB current step is 73.2 µA. To obtain a voltage output, a resistor must be connected to ground. Output voltage depends upon this external resistor, the reference voltage, and the value of the gain-setting resis- tor connected between RREF and GND. To implement a doubly-terminated 75 Ω transmission line, a shunt 75 Ω resistor should be placed adjacent to the analog output pin. With a terminated 75 Ω line connected to the analog output, the load on the FMS3818 current source is 37.5 Ω. The FMS3818 may also be operated with a single 75 Ohm terminating resistor. To lower the output voltage swing to the desired range, the nominal value of the RREF resistor should be doubled. Voltage Reference Full scale current is a multiple of the current ISET through an external resistor, RSET connected between the RREF pin and GND. Voltage across RSET is the reference voltage, VREF, which can be derived from either the 1.25 volt internal bandgap reference or an external voltage reference connected to VREF. To minimize noise, a 0.1µF capacitor should be connected between VREF and ground. ISET is mirrored to each of the GBR output current sources. To minimize noise, a 0.1µF capacitor should be connected between the COMP pin and the analog supply voltage VDDA. Power and Ground Required power is a single +3.3 Volt supply. To minimize power supply induced noise, analog +3.3V should be connected to VDDD and VDDA pins with 0.1 and 0.01 µF decoupling capacitors placed adjacent to each VDD pin or pin pair. High slew-rate digital data makes capacitive coupling to the outputs of any D/A converter a potential problem. Since the digital signals contain high-frequency components of the CLK signal, as well as the video output signal, the resulting data feedthrough often looks like harmonic distortion or reduced signal-to-noise performance. All ground pins should be connected to a common solid ground plane for best performance. VDDA SYNC VDDA VDDA G7-0 B7-0 VDDA R7-0 IOS data: 700 mV max. sync: 307 mV |
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