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ISL6224 Datasheet(PDF) 10 Page - Intersil Corporation |
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ISL6224 Datasheet(HTML) 10 Page - Intersil Corporation |
10 / 13 page 10 FN9042.8 June 8, 2006 Layout Considerations MOSFETs switch very fast and efficiently. The speed with which the current transitions from one device to another causes voltage spikes across the interconnecting impedances and parasitic circuit elements. The voltage spikes can degrade efficiency, radiate noise into the circuit, and lead to device overvoltage stress. Careful component layout and printed circuit design minimizes the voltage spikes in the converter. Consider, as an example, the turn-off transition of one of the upper PWM MOSFETs. Prior to turn-off, the upper MOSFET is carrying the full load current. During the turn-off, current stops flowing in the upper MOSFET and is picked up by the lower MOSFET. Any inductance in the switched current path generates a voltage spike during the switching interval. Careful component selection, tight layout of the critical components, and short, wide circuit traces minimize the magnitude of voltage spikes. See the Application Note AN9983 for the evaluation board component placement and the printed circuit board layout details. There are two sets of critical components in a DC/DC converter using an ISL6224 controller. The switching power components are the most critical because they switch large amounts of energy, and as such, they tend to generate equally large amounts of noise. The critical small signal components are those connected to sensitive nodes or those supplying critical bias currents. Power Components Layout Considerations The power components and the controller IC should be placed first. Locate the input capacitors, especially the high- frequency ceramic decoupling capacitors, close to the power MOSFETs. Locate the output inductor and output capacitors between the MOSFETs and the load. Locate the PWM controller close to the MOSFETs. Insure the current paths from the input capacitors to the MOSFETs, to the output inductors and output capacitors are as short as possible with maximum allowable trace widths. A multi-layer printed circuit board is recommended. Dedicate one solid layer for a ground plane and make all critical component ground connections with vias to this layer. Dedicate another solid layer as a power plane and break this plane into smaller islands of common voltage levels. The power plane should support the input power and output power nodes. Use copper filled polygons on the top and bottom circuit layers for the phase nodes, but do not unnecessarily oversize these particular islands. Since the phase nodes are subjected to very high dV/dt voltages, the stray capacitor formed between these islands and the surrounding circuitry will tend to couple switching noise. Use the remaining printed circuit layers for small signal wiring. The wiring traces from the control IC to the MOSFET gate and source should be sized to carry 2A peak currents. Small Components Signal Layout Considerations The Vin pin 1 input should be bypassed with a 1.0µF capacitor. The bypass capacitors for Vin and the soft-start capacitor, should be located close to their connecting pins on the control IC. Refer to the Application Note AN9983 for a recommended component placement and interconnections. Figures 5, 6 and 7 show application circuits for the three modes of operation. Mode 1 is operating from battery voltage and operating at 300kHz switching frequency. Mode 2 is operating off of 5V and operating at 300kHz switching frequency. Mode 3 is operating off of 5V and operating at 600kHz switching frequency. ISL6224 |
Similar Part No. - ISL6224_06 |
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Similar Description - ISL6224_06 |
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