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ISL95711WIU10Z Datasheet(PDF) 2 Page - Intersil Corporation |
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ISL95711WIU10Z Datasheet(HTML) 2 Page - Intersil Corporation |
2 / 13 page 2 FN8241.3 September 5, 2006 Block Diagram 7-BIT WIPER REGISTER 7-BIT NONVOLATILE MEMORY STORE AND RECALL CONTROL CIRCUITRY ONE OF 128 DECODER RESISTOR ARRAY RH SDA SCL TRANSFER GATES RL RW CONTROL AND MEMORY V- RH RW RL SIMPLE BLOCK DIAGRAM DETAILED BLOCK DIAGRAM 0 1 2 124 125 126 127 VCC (VOLATILE) SLAVE ADDRESS DECODE A1 A0 SDA SCL A1 A0 GND Pin Descriptions PIN NUMBER SYMBOL DESCRIPTION 1 SDA Open drain Data I/O for I2C serial interface 2 V- Negative supply voltage for the potentiometer wiper control 3 GND Ground 4 A1 A1 and A0 are address select pins used to set the slave address for the I2C serial interface 5 A0 A1 and A0 are address select pins used to set the slave address for the I2C serial interface 6RH A fixed terminal for one end of the potentiometer resistor. 7RW The wiper terminal which is equivalent to the movable terminal of a potentiometer. 8RL A fixed terminal for one end of the potentiometer resistor. 9VCC Positive logic supply voltage 10 SCL Clock input for the I2C serial interface ISL95711 |
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