 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
X98017L128-3.3 Datasheet(PDF) 10 Page - Intersil Corporation |
|
||||||||||||||||||||||||||||||
X98017L128-3.3 Datasheet(HTML) 10 Page - Intersil Corporation |
|
|
10 / 29 page  10 FN8218.3 March 8, 2006 HSOUT 125 3.3V digital output. HSYNC output aligned with pixel data. Use this output to frame the digital output data. This output is always purely horizontal sync (without any composite sync signals) VSOUT 126 3.3V digital output.Artificial VSYNC output aligned with pixel data. VSYNC is generated 8 pixel clocks after the trailing edge of HSOUT. This signal is usually not needed - use VSYNCOUT as VSYNC source. HSYNCOUT 127 3.3V digital output. Buffered HSYNC (or SOG or CSYNC) output. This is typically used to measure HSYNC period. HSOUT should be used to detect the beginning of a line. This output will pass composite sync signals and Macrovision signals if present on HSYNCIN or SOGIN. VSYNCOUT 128 3.3V digital output. Buffered VSYNC output. For composite sync signals, this output will be asserted for the duration of the disruption of the normal HSYNC pattern. This is typically used to detect the beginning of a frame and measure the VSYNC period. VA 6, 11, 18, 20, 29, 35 Power supply for the analog section. Connect to a 3.3V supply and bypass each pin to GNDA with 0.1µF. GNDA 3, 5, 8, 10, 15, 17, 21, 23, 27, 30, 36 Ground return for VA and VBYPASS. VD 54, 67, 77, 89, 99, 111, 124 Power supply for all digital I/Os. Connect to a 3.3V supply and bypass each pin to GNDD with 0.1µF. GNDD 32, 43, 51, 53, 66, 76, 78, 88, 98, 108, 110, 120, 123 Ground return for VD, VCORE, VCOREADC, and VPLL. VX 38 Power supply for crystal oscillator. Connect to a 3.3V supply and bypass to GNDX with 0.1µF. GNDX 37 Ground return for VX. VBYPASS 4, 9, 16 Bypass these pins to GNDA with 0.1µF. Do not connect these pins to each other or anything else. VREGIN 65 3.3V input voltage for VCORE voltage regulator. Connect to a 3.3V source, and bypass to GNDD with 0.1µF. VREGOUT 64 Regulated output voltage for VPLL, VCOREADC and VCORE; typically 1.9V. Connect only to VPLL, VCOREADC and VCORE and bypass at input pins as instructed below. Do not connect to anything else - this output can only supply power to VPLL, VCOREADC and VCORE. VCOREADC 31 Internal power for the ADC’s digital logic. Connect to VREGOUT through a 10Ω resistor and bypass to GNDD with 0.1µF. VPLL 42 Internal power for the PLL’s digital logic. Connect to VREGOUT through a 10Ω resistor and bypass to GNDD with 0.1µF. VCORE 52, 79, 109 Internal power for core logic. Connect to VREGOUT and bypass each pin to GNDD with 0.1µF. NC 1, 2, 63 Reserved. Do not connect anything to these pins. Pin Descriptions (Continued) SYMBOL PIN DESCRIPTION X98017 |
Similar Part No. - X98017L128-3.3 |
|
Similar Description - X98017L128-3.3 |
|
|
Link URL |
| Privacy Policy |
| ALLDATASHEET.COM |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
