X9521V20I-B datasheet(3/24 Pages) INTERSIL

Part #	X9521V20I-B

Description	Dual DCP, EEPROM Memory

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Manufacturer	INTERSIL [Intersil Corporation]

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FN8207.1

January 3, 2006

PRINCIPLES OF OPERATION

SERIAL INTERFACE

Serial Interface Conventions

The device supports a bidirectional bus oriented protocol.

The protocol defines any device that sends data onto the

bus as a transmitter, and the receiving device as the

receiver. The device controlling the transfer is called the

master and the device being controlled is called the

slave. The master always initiates data transfers, and

provides the clock for both transmit and receive opera-

tions. Therefore, the X9521 operates as a slave in all

applications.

Serial Clock and Data

Data states on the SDA line can change only while SCL

is LOW. SDA state changes while SCL is HIGH are

reserved for indicating START and STOP conditions.

See Figure 1. On power-up of the X9521, the SDA pin is

in the input mode.

Serial Start Condition

All commands are preceded by the START condition,

which is a HIGH to LOW transition of SDA while SCL is

HIGH. The device continuously monitors the SDA and

SCL lines for the START condition and does not respond

to any command until this condition has been met. See

Figure 2.

Serial Stop Condition

All communications must be terminated by a STOP

condition, which is a LOW to HIGH transition of SDA

while SCL is HIGH. The STOP condition is also used to

place the device into the Standby power mode after a

read sequence. A STOP condition can only be issued

after the transmitting device has released the bus. See

Figure 2.

Serial Acknowledge

An ACKNOWLEDGE (ACK) is a software convention

used to indicate a successful data transfer. The transmit-

ting device, either master or slave, will release the bus

after transmitting eight bits. During the ninth clock cycle,

the receiver will pull the SDA line LOW to ACKNOWL-

EDGE that it received the eight bits of data. Refer to

Figure 3.

The device will respond with an ACKNOWLEDGE after

recognition of a START condition if the correct Device

Identifier bits are contained in the Slave Address Byte. If

a write operation is selected, the device will respond with

an ACKNOWLEDGE after the receipt of each subse-

quent eight bit word.

In the read mode, the device will transmit eight bits of

data, release the SDA line, then monitor the line for an

ACKNOWLEDGE. If an ACKNOWLEDGE is detected

and no STOP condition is generated by the master, the

device will continue to transmit data. The device will ter-

minate further data transmissions if an ACKNOWLEDGE

is not detected. The master must then issue a STOP

condition to place the device into a known state.

SCL

SDA

Data Stable

Data Change

Data Stable

Figure 1.

Valid Data Changes on the SDA Bus

SCL

SDA

Start

Stop

Figure 2.

Valid Start and Stop Conditions

X9521

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