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X9521V20I-A Datasheet(PDF) 2 Page - Intersil Corporation |
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X9521V20I-A Datasheet(HTML) 2 Page - Intersil Corporation |
2 / 24 page 2 FN8207.1 January 3, 2006 PIN CONFIGURATION PIN ASSIGNMENT Ordering Information PART NUMBER PART MARKING PRESET (FACTORY SHIPPED) VTRIPx THRESHOLD LEVELS (x = 2, 3) TEMP RANGE (°C) PACKAGE X9521V20I-A X9521VIA Optimized for 3.3V system monitoring -40 to +85 20 Ld TSSOP X9521V20I-B X9521VIB Optimized for 5V system monitoring -40 to +85 20 Ld TSSOP X9521V20IZ-A (Note) X9521VZIA Optimized for 3.3V system monitoring -40 to +85 20 Ld TSSOP (Pb-free) X9521V20IZ-B (Note) X9521VZIB Optimized for 5V system monitoring -40 to +85 20 Ld TSSOP (Pb-free) NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. NC RL2 NC 3 4 Vcc SCL NC NC RW1 RH1 7 8 NC VSS 10 RL1 RH2 1 18 19 17 20 14 15 13 16 12 11 NC 6 RW2 2 SDA 9 NC 5 WP NC NC 20 Pin TSSOP Pin Name Function 1 RH2 Connection to end of resistor array for (the 256 Tap) DCP 2. 2 Rw2 Connection to terminal equivalent to the “Wiper” of a mechanical potentiometer for DCP 2. 3 RL2 Connection to other end of resistor array for (the 256 Tap) DCP2. 7WP Write Protect Control Pin. WP pin is a TTL level compatible input. When held HIGH, Write Protection is enabled. In the enabled state, this pin prevents all nonvolatile “write” operations. Also, when the Write Pro- tection is enabled, and the device Block Lock feature is active (i.e. the Block Lock bits are NOT [0,0]), then no “write” (volatile or nonvolatile) operations can be performed in the device (including the wiper position of any of the integrated Digitally Controlled Potentiometers (DCPs). The WP pin uses an internal “pull- down” resistor, thus if left floating the write protection feature is disabled. 8SCL Serial Clock. This is a TTL level compatible input pin used to control the serial bus timing for data input and output. 9SDA Serial Data. SDA is a bidirectional TTL level compatible pin used to transfer data into and out of the de- vice. The SDA pin input buffer is always active (not gated). This pin requires an external pull up resistor. 10 Vss Ground. 11 RL1 Connection to other end of resistor for (the 100 Tap) DCP 1. 12 Rw1 Connection to terminal equivalent to the “Wiper” of a mechanical potentiometer for DCP 1 13 RH1 Connection to end of resistor array for (the 100 Tap) DCP 1. 20 Vcc Supply Voltage. 4, 5, 6, 14, 15, 16, 17, 18, 19 NC No connect. X9521 |
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