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P82C150AHT Datasheet(PDF) 8 Page - NXP Semiconductors |
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P82C150AHT Datasheet(HTML) 8 Page - NXP Semiconductors |
8 / 36 page 1996 Jun 19 8 Philips Semiconductors Preliminary specification CAN Serial Linked I/O device (SLIO) with digital and analog port functions P82C150 7 FUNCTIONAL DESCRIPTION 7.1 I/O functions The P82C150 provides 16 port pins (P15 to P0) which are individually configurable via CAN-bus. Besides the digital I/O functions some of these port pins provide analog I/O functions. 7.1.1 DIGITAL INPUT FUNCTIONS Input levels HIGH and LOW on the port pins (P15 to P0) can be read in two ways by the host node: • Polling: a Remote Frame is sent to the P82C150 to be answered by a Data Frame containing the Data Input Register contents. • Event capture: in case of edge-triggered mode, the P82C150 sends the same Data Frame caused by the event of a rising and/or falling edge on the corresponding port pins (see Table 3). 7.1.2 DIGITAL OUTPUT FUNCTIONS The Data Output Register is set via a CAN message. Its content is only output when the corresponding bits of the Output Enable Register are set to logic 1s. 7.1.3 ANALOG INPUT/OUTPUT FUNCTIONS • Up to six multiplexed analog input signals for analog-to-digital conversion or general purpose • Up to two quasi-analog output channels (DPM; Distributed Pulse Modulation) • Two input comparators, for example for window comparator applications • A separate analog-to-digital input comparator with feedback output. Analog-to-digital converted digital results are obtained by reading the Analog-to-Digital Conversion (ADC) Register. Analog functions of each port pin are individually controlled by the Analog Configuration Register. Writing the I/O registers is done serially via CAN-bus by Data Frames. The first data byte contains the register address, and the second and third data bytes represent the register contents. If a read only register is addressed, the contents of the second and third data bytes are ignored. It is recommended to set unused port pins to HIGH (100 k Ω resistor to VDD). Fig.4 I/O port pins. handbook, halfpage Px MHA068 DIx DOx OEx 3-state buffer P82C150 |
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