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X4283S8IZ-2.7 Datasheet(PDF) 1 Page - Intersil Corporation

Part # X4283S8IZ-2.7
Description  CPU Supervisor with 128K EEPROM
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Manufacturer  INTERSIL [Intersil Corporation]
Direct Link  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

X4283S8IZ-2.7 Datasheet(HTML) 1 Page - Intersil Corporation

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1
®
FN8121.1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
| Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2005-2006. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
X4283, X4285
128K, 16K x 8 Bit
CPU Supervisor with 128K EEPROM
FEATURES
• Selectable watchdog timer
•Low VCC detection and reset assertion
—Four standard reset threshold voltages
—Adjust low VCC reset threshold voltage using
special programming sequence
—Reset signal valid to VCC = 1V
• Low power CMOS
—<20µA max standby current, watchdog on
—<1µA standby current, watchdog OFF
—3mA active current
• 128Kbits of EEPROM
—64 byte page write mode
—Self-timed write cycle
—5ms write cycle time (typical)
• Built-in inadvertent write protection
—Power-up/power-down protection circuitry
—Protect 0, 1/4, 1/2, all or 64, 128, 256 or 512
bytes of EEPROM array with programmable
Block Lockprotection
• 400kHz 2-wire interface
• 2.7V to 5.5V power supply operation
• Available packages
—8 Ld SOIC
—8 Ld TSSOP
• Pb-free plus anneal available (RoHS compliant)
DESCRIPTION
The X4283, X4285 combines four popular functions,
Power-on Reset Control, Watchdog Timer, Supply
Voltage Supervision, and Block Lock protect serial
EEPROM memory in one package. This combination
lowers system cost, reduces board space require-
ments, and increases reliability.
Applying power to the device activates the power-on
reset circuit which holds RESET/RESET active for a
period of time. This allows the power supply and oscilla-
tor to stabilize before the processor can execute code.
The Watchdog Timer provides an independent protec-
tion mechanism for microcontrollers. When the micro-
controller fails to restart a timer within a selectable
time
out
interval,
the
device
activates
the
RESET/RESET signal. The user selects the interval
from three preset values. Once selected, the interval
does not change, even after cycling the power.
The device’s low VCC detection circuitry protects the
user’s system from low voltage conditions, resetting
the system when VCC falls below the set minimum VCC
trip point. RESET/RESET is asserted until VCC returns
to proper operating level and stabilizes. Four industry
standard Vtrip thresholds are available, however, Inter-
sil’s unique circuits allow the threshold to be repro-
grammed to meet custom requirements or to fine-tune
the threshold for applications requiring higher precision.
BLOCK DIAGRAM
Watchdog
Timer Reset
Data
Register
Command
Decode &
Control
Logic
SDA
SCL
VCC
Reset &
Watchdog
Timebase
Power-on and
Generation
VTRIP
+
-
RESET (X4283)
Reset
Low Voltage
Status
Register
Protect Logic
EEPROM Array
Watchdog Transition
Detector
WP
VCC Threshold
Reset logic
RESET (X4285)
S0
S1
Kb=Kilobyte
Data Sheet
May 23, 2006


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