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ISL65426 Datasheet(PDF) 20 Page - Intersil Corporation

Part No. ISL65426
Description  6A Dual Synchronous Buck Regulator with Integrated MOSFETs
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Maker  INTERSIL [Intersil Corporation]
Homepage  http://www.intersil.com/cda/home
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ISL65426 Datasheet(HTML) 20 Page - Intersil Corporation

 
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20
FN6340.2
February 21, 2007
Component Placement
Determine the total implementation area and orient the
critical switching components first. These include the
controller, input and output capacitors, and the output
inductors. Symmetry is very important in determining how
available space is filled and depends on the power block
configuration selected. The controller must be placed
equidistant from each output stage with the LX, or phase,
connection distance minimized.
An output stage consists of the area reserved for the output
inductor, and input capacitors, and output capacitors for a
single channel. Place the inductor such that one pad is a
minimal distance from the associated phase connection.
Orient the inductor such that the load device is a short
distance from the other pad. Placement of the input
capacitors a minimal distance from the PVIN pins prevents
long distances from adding too much trace inductance and a
reduction in capacitor performance. Locate the output
capacitors between the inductor and the load device, while
keeping them in close proximity. Care should be taken not to
add inductance through long trace lengths that could cancel
the usefulness of the low inductance components. Keeping
the components in tight proximity will help reduce parasitic
impedances once the components are routed together.
Bypass capacitors, CBP, supply critical filtering and must be
placed close to their respective pins. Stray trace parasitics
will reduce their effectiveness, so keep the distance between
the VCC bias supply pad and capacitor pad to a minimum.
Plane Allocation
PCB designers typically have a set number of planes
available for a converter design. Dedicate one solid layer,
usually an internal layer underneath the component side of
the board, for a ground plane and make all critical
component ground connections with vias to this layer.
One additional solid layer is dedicated as a power plane and
broken into smaller islands of common voltage. The power
plane should support the input power and output power
nodes. Use copper filled polygons on the top and bottom
circuit layers for the phase nodes. Use the remaining printed
circuit board layers for small signal wiring and additional
power or ground islands as required.
Signal Routing
If the output stage component placement guidelines are
followed, stray inductance in the switch current path is
minimized along with good routing techniques. Great
attention should be paid to routing the PHASE plane since
high current pulses are driven through them. Stray
inductance in this high-current path induce large noise
voltages that couple into sensitive circuitry. By keeping the
PHASE plane small, the magnitude of the potential spikes is
minimized. It is important to size traces from the LX pins to
the PHASE plane as large and short as possible to reduce
their overall impedance and inductance.
Sensitive signals should be routed on different layers or
some distance away from the PHASE plane on the same
layer. Crosstalk due to switching noise is reduced into these
lines by isolating the routing path away from the PHASE
plane. Layout the PHASE planes on one layer, usually the
top or bottom layer, and route the voltage feedback traces on
another layer remaining.
VOUT
LOUT
COUT
CIN
VIN
ISL65426
LX
CBP
VCC
FIGURE 38. PRINTED CIRCUIT BOARD POWER PLANES AND ISLANDS
GND
FB
PGND
VIN
CHFOUT
LOAD
PHASE
PVIN
VIA CONNECTION TO GROUND PLANE
ISLAND ON CIRCUIT PLANE LAYER
ISLAND ON POWER PLANE LAYER
KEY
THICK TRACE ON CIRCUIT PLANE LAYER
ISL65426


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