8

FN6333.2

September 15, 2006

Pin Description

Potentiometers Pins

RWi (i = 0, 1, 2, 3)

RWi is the wiper terminal and is equivalent to the movable

terminal of a mechanical potentiometer. The position of the

wiper within the array is determined by the WRi register.

SHDN

The SHDN pin forces the resistors to end-to-end open circuit

condition and shorts all RWs to GND. When SHDN is

returned to logic high, the previous latch settings put RWi at

the same resistance setting prior to shutdown. This pin is

logically OR’d with SHDN bit in ACR register. SPI interface is

still available in shutdown mode and all registers are

accessible. This pin must remain HIGH for normal operation.

FIGURE 11. DCP CONNECTION IN SHUTDOWN MODE

Bus Interface Pins

Serial Clock (SCK)

This is the serial clock input of the SPI serial interface.

TEMPERATURE

FIGURE 8. TC FOR VOLTAGE DIVIDER MODE IN ppm

FIGURE 9. MIDSCALE GLITCH, CODE 80h TO 7Fh

FIGURE 10. LARGE SIGNAL SETTLING TIME

-1.00

-0.50

0.00

0.50

1.00

-40

-20

0

20

40

60

80

100

120

TEMPERATURE (ºC)

10k

50k

Vcc = 5.5V

Vcc = 2.7V

0

15

30

45

60

75

90

105

16

36

56

76

96

TAP POSITION (DECIM AL)

10k

50k

RW

ISL22449