2

FN6050.7

July 31, 2006

Pinout

ISL8487, ISL81483, ISL81487 (PDIP, SOIC)

TOP VIEW

RO

RE

DE

DI

1

2

3

4

8

7

6

5

B/Z

A/Y

GND

D

R

Truth Tables

TRANSMITTING

INPUTS

OUTPUTS

RE

DE

DI

Z

Y

X

1101

X

1010

0

0

X

High-Z

High-Z

1

0

X

High-Z *

High-Z *

*Shutdown Mode for ISL8487, ISL81483 (see Note 7)

RECEIVING

INPUTS

OUTPUT

RE

DE

A-B

RO

00

≥ +0.2V

1

00

≤ -0.2V

0

0

0

Inputs Open

1

10

X

High-Z *

1

1

X

High-Z

*Shutdown Mode for ISL8487, ISL81483 (see Note 7)

Ordering Information

PART NO.

PART MARKING

TEMP. RANGE (°C)

PACKAGE

PKG. DWG. #

ISL8487IB

8487IB

-40 to 85

8 Ld SOIC*

M8.15

ISL8487IBZ (Note)

8487IBZ

-40 to 85

8 Ld SOIC

M8.15

ISL8487IP

ISL8487IP

-40 to 85

8 Ld PDIP

E8.3

ISL8487IPZ (Note)

8487IPZ

-40 to 85

8 Ld PDIP** (Pb-free)

E8.3

ISL81483IB

81483IB

-40 to 85

8 Ld SOIC*

M8.15

ISL81483IBZ (Note)

81483IBZ

-40 to 85

8 Ld SOIC* (Pb-free)

M8.15

ISL81483IP

ISL81483IP

-40 to 85

8 Ld PDIP

E8.3

ISL81483IPZ (Note)

81483IPZ

-40 to 85

8 Ld PDIP** (Pb-free)

E8.3

ISL81487IB

81487IB

-40 to 85

8 Ld SOIC*

M8.15

ISL81487IBZ (Note)

81487IBZ

-40 to 85

8 Ld SOIC* (Pb-free)

M8.15

ISL81487IP

ISL81487IP

-40 to 85

8 Ld PDIP

E8.3

ISL81487IPZ (Note)

81487IPZ

-40 to 85

8 Ld PDIP** (Pb-free)

E8.3

*SOIC also available in Tape and Reel; Add “-T” to suffix.

**Pb-free PDIPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing applications.

NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish,

which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow

temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.

ISL8487, ISL81483, ISL81487