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ISL8483EIP Datasheet(PDF) 5 Page - Intersil Corporation

Part # ISL8483EIP
Description  ESD Protected to 짹15kV, 5V, Low Power, High Speed or Slew Rate Limited, RS-485/RS-422 Transceivers
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Manufacturer  INTERSIL [Intersil Corporation]
Direct Link  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

ISL8483EIP Datasheet(HTML) 5 Page - Intersil Corporation

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5
No-Load Supply Current, (Note 3)
ICC
ISL8485E, DI, RE = 0V
or VCC
DE = VCC
Full
-
700
900
µA
DE = 0V
Full
-
500
565
µA
ISL8483E, DI, RE = 0V
or VCC
DE = VCC
Full
-
470
650
µA
DE = 0V
Full
-
160
250
µA
Shutdown Supply Current
ISHDN
ISL8483E, DE = 0V, RE = VCC, DI = 0V or VCC
Full
-
1
50
nA
Driver Short-Circuit Current,
VO = High or Low
IOSD1
DE = VCC, -7V ≤ VY or VZ ≤ 12V, (Note 4)
Full
35
-
250
mA
Receiver Short-Circuit Current
IOSR
0V
≤ VO ≤ VCC
Full
7
-
85
mA
SWITCHING CHARACTERISTICS (ISL8485E)
Driver Input to Output Delay
tPLH, tPHL RDIFF = 54Ω, CL = 100pF, (Figure 2)
Full
18
30
50
ns
Driver Output Skew
tSKEW
RDIFF = 54Ω, CL = 100pF, (Figure 2)
Full
-
2
10
ns
Driver Differential Rise or Fall Time
tR, tF
RDIFF = 54Ω, CL = 100pF, (Figure 2)
Full
3
11
25
ns
Driver Enable to Output High
tZH
CL = 100pF, SW = GND, (Figure 3)
Full
-
17
70
ns
Driver Enable to Output Low
tZL
CL = 100pF, SW = VCC, (Figure 3)
Full
-
14
70
ns
Driver Disable from Output High
tHZ
CL = 15pF, SW = GND, (Figure 3)
Full
-
19
70
ns
Driver Disable from Output Low
tLZ
CL = 15pF, SW = VCC, (Figure 3)
Full
-
13
70
ns
Receiver Input to Output Delay
tPLH, tPHL (Figure 4)
Full
30
40
150
ns
Receiver Skew | tPLH - tPHL |tSKD
(Figure 4)
25
-
5
-
ns
Receiver Enable to Output High
tZH
CL = 15pF, SW = GND, (Figure 5)
Full
-
9
50
ns
Receiver Enable to Output Low
tZL
CL = 15pF, SW = VCC, (Figure 5)
Full
-
9
50
ns
Receiver Disable from Output High
tHZ
CL = 15pF, SW = GND, (Figure 5)
Full
-
9
50
ns
Receiver Disable from Output Low
tLZ
CL = 15pF, SW = VCC, (Figure 5)
Full
-
9
50
ns
Maximum Data Rate
fMAX
(Note 11)
Full
5
-
-
Mbps
SWITCHING CHARACTERISTICS (ISL8483E)
Driver Input to Output Delay
tPLH, tPHL RDIFF = 54Ω, CL = 100pF, (Figure 2)
Full
250
800
2000
ns
Driver Output Skew
tSKEW
RDIFF = 54Ω, CL = 100pF, (Figure 2)
Full
-
160
800
ns
Driver Differential Rise or Fall Time
tR, tF
RDIFF = 54Ω, CL = 100pF, (Figure 2)
Full
250
800
2000
ns
Driver Enable to Output High
tZH
CL = 100pF, SW = GND, (Figure 3), (Note 5)
Full
250
-
2000
ns
Driver Enable to Output Low
tZL
CL = 100pF, SW = VCC, (Figure 3), (Note 5)
Full
250
-
2000
ns
Driver Disable from Output High
tHZ
CL = 15pF, SW = GND, (Figure 3)
Full
300
-
3000
ns
Driver Disable from Output Low
tLZ
CL = 15pF, SW = VCC, (Figure 3)
Full
300
-
3000
ns
Receiver Input to Output Delay
tPLH, tPHL (Figure 4)
Full
250
350
2000
ns
Receiver Skew | tPLH - tPHL |tSKD
(Figure 4)
25
-
25
-
ns
Receiver Enable to Output High
tZH
CL = 15pF, SW = GND, (Figure 5), (Note 6)
Full
-
10
50
ns
Receiver Enable to Output Low
tZL
CL = 15pF, SW = VCC, (Figure 5), (Note 6)
Full
-
10
50
ns
Receiver Disable from Output High
tHZ
CL = 15pF, SW = GND, (Figure 5)
Full
-
10
50
ns
Receiver Disable from Output Low
tLZ
CL = 15pF, SW = VCC, (Figure 5)
Full
-
10
50
ns
Maximum Data Rate
fMAX
(Note 11)
Full
250
-
-
kbps
Time to Shutdown
tSHDN
(Note 7)
Full
50
200
600
ns
Driver Enable from Shutdown to
Output High
tZH(SHDN) CL = 100pF, SW = GND, (Figure 3), (Notes 7, 8)
Full
-
-
2000
ns
Electrical Specifications
Test Conditions: VCC = 4.5V to 5.5V; Unless Otherwise Specified.
Typicals are at VCC = 5V, TA = 25°C, (Note 2) (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
TEMP
(°C)
MIN
TYP
MAX
UNITS
ISL8483E, ISL8485E


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