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74VCX38 Datasheet(PDF) 4 Page - Fairchild Semiconductor

Part No. 74VCX38
Description  Low Voltage Quad 2-Input NAND Gate with Open Drain Outputs and 3.6V Tolerant Inputs and Outputs
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Maker  FAIRCHILD [Fairchild Semiconductor]
Homepage  http://www.fairchildsemi.com
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74VCX38 Datasheet(HTML) 4 Page - Fairchild Semiconductor

 
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4
AC Electrical Characteristics (Note 5)
Note 5: For CL 50PF, add approximately 300 ps to the 30 pF AC maximum specification.
Note 6: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The
specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH).
Dynamic Switching Characteristics
Capacitance
Symbol
Parameter
Conditions
VCC
TA 40qC to 85qC
Units
Figure
(V)
Min
Max
Number
tPZL,
Propagation Delay
CL 30 pF, RL 500:
3.3
r 0.3
0.6
2.8
ns
Figures
1, 2
tPLZ
2.5
r 0.2
0.8
3.7
1.8
r 0.15
1.0
6.7
CL 15 pF, RL 2k:
1.5
r 0.1
1.0
13.4
Figures
3, 4
1.2
33.5
tOSHL
Output to Output Skew
CL 30 pF, RL 500:
3.3
r 0.3
0.5
ns
tOSLH
(Note 6)
2.5
r 0.2
0.5
1.8
r 0.15
0.75
CL 15 pF, RL 2k:
1.5
r 0.1
1.5
1.2
1.5
Symbol
Parameter
Conditions
VCC
TA 25qC
Units
(V)
Typical
VOLP
Quiet Output Dynamic Peak VOL
CL 30 pF, VIH VCC, VIL 0V
1.8
0.25
2.5
0.6
V
3.3
0.8
VOLV
Quiet Output Dynamic Valley VOL
CL 30 pF, VIH VCC, VIL 0V
1.8
0.25
2.5
0.6
V
3.3
0.8
Symbol
Parameter
Conditions
TA 25qC
Units
Typical
CIN
Input Capacitance
VI 0v OR VCC, VCC 1.8V, 2.5V or 3.3V
6.0
pF
COUT
Output Capacitance
VI 0V or VCC, VCC 1.8V, 2.5V or 3.3V
7.0
pF
CPD
Power Dissipation Capacitance
VI 0V or VCC, f 10 MHz, VCC 1.8V, 2.5V or 3.3V
20.0
pF


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